#include "Target/RISCV/RISCVRegisterInfo.h"

Inheritance diagram for llvm::RISCVRegisterInfo:

Public Member Functions
	RISCVRegisterInfo (unsigned HwMode, const std::bitset< 32 > &UserReservedXRegs)
	`UserReservedXRegs` is the set of X registers reserved by the reserve-xN features, indexed by N.
const uint32_t *	getCallPreservedMask (const MachineFunction &MF, CallingConv::ID) const override
unsigned	getCSRCost () const override
const MCPhysReg *	getCalleeSavedRegs (const MachineFunction *MF) const override
const TargetRegisterClass *	getConstrainedRegClassForReg (Register Reg, const MachineRegisterInfo &MRI) const override
const TargetRegisterClass *	getRegClassForTypeOnBank (LLT Ty, const RegisterBank &RB, bool Is64Bit) const
const MCPhysReg *	getIPRACSRegs (const MachineFunction *MF) const override
BitVector	getReservedRegs (const MachineFunction &MF) const override
bool	isRegisterReservedByUser (MCRegister Reg) const
	Returns true if `Reg` is, or overlaps, a register reserved by the reserve-xN features, e.g.
bool	isAsmClobberable (const MachineFunction &MF, MCRegister PhysReg) const override
const uint32_t *	getNoPreservedMask () const override
void	adjustReg (MachineBasicBlock &MBB, MachineBasicBlock::iterator II, const DebugLoc &DL, Register DestReg, Register SrcReg, StackOffset Offset, MachineInstr::MIFlag Flag, MaybeAlign RequiredAlign) const
bool	eliminateFrameIndex (MachineBasicBlock::iterator MI, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override
bool	requiresVirtualBaseRegisters (const MachineFunction &MF) const override
bool	needsFrameBaseReg (MachineInstr *MI, int64_t Offset) const override
bool	isFrameOffsetLegal (const MachineInstr *MI, Register BaseReg, int64_t Offset) const override
Register	materializeFrameBaseRegister (MachineBasicBlock *MBB, int FrameIdx, int64_t Offset) const override
void	resolveFrameIndex (MachineInstr &MI, Register BaseReg, int64_t Offset) const override
int64_t	getFrameIndexInstrOffset (const MachineInstr *MI, int Idx) const override
void	lowerSegmentSpillReload (MachineBasicBlock::iterator II, bool IsSpill) const
Register	getFrameRegister (const MachineFunction &MF) const override
bool	isArgumentRegister (const MachineFunction &MF, MCRegister Reg) const override
StringRef	getRegAsmName (MCRegister Reg) const override
bool	requiresRegisterScavenging (const MachineFunction &MF) const override
bool	requiresFrameIndexScavenging (const MachineFunction &MF) const override
const TargetRegisterClass *	getLargestLegalSuperClass (const TargetRegisterClass *RC, const MachineFunction &) const override
void	getOffsetOpcodes (const StackOffset &Offset, SmallVectorImpl< uint64_t > &Ops) const override
std::pair< Register, Register >	getGPRPairSubRegs (MCRegister Pair) const
unsigned	getRegisterCostTableIndex (const MachineFunction &MF) const override
float	getSpillWeightScaleFactor (const TargetRegisterClass *RC) const override
bool	getRegAllocationHints (Register VirtReg, ArrayRef< MCPhysReg > Order, SmallSetVector< MCPhysReg, 16 > &Hints, const MachineFunction &MF, const VirtRegMap VRM, const LiveRegMatrix Matrix) const override
void	updateRegAllocHint (Register Reg, Register NewReg, MachineFunction &MF) const override
MCRegister	findVRegWithEncoding (const TargetRegisterClass &RegClass, uint16_t Encoding) const

Static Public Member Functions
static bool	isVRRegClass (const TargetRegisterClass *RC)
static bool	isVRNRegClass (const TargetRegisterClass *RC)
static bool	isRVVRegClass (const TargetRegisterClass *RC)
static bool	isFPRegister (MCRegister Reg)

Detailed Description

Definition at line 65 of file RISCVRegisterInfo.h.

Constructor & Destructor Documentation

◆ RISCVRegisterInfo()

RISCVRegisterInfo::RISCVRegisterInfo	(	unsigned	HwMode,
		const std::bitset< 32 > &	UserReservedXRegs )

UserReservedXRegs is the set of X registers reserved by the reserve-xN features, indexed by N.

Definition at line 49 of file RISCVRegisterInfo.cpp.

References I, and llvm::MCRegAliasIterator::isValid().

Referenced by isArgumentRegister().

Member Function Documentation

◆ adjustReg()

void RISCVRegisterInfo::adjustReg	(	MachineBasicBlock &	MBB,
		MachineBasicBlock::iterator	II,
		const DebugLoc &	DL,
		Register	DestReg,
		Register	SrcReg,
		StackOffset	Offset,
		MachineInstr::MIFlag	Flag,
		MaybeAlign	RequiredAlign ) const

Definition at line 236 of file RISCVRegisterInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::BuildMI(), contains(), DL, llvm::MachineInstr::FrameDestroy, llvm::MachineInstr::FrameSetup, llvm::StackOffset::getFixed(), getFrameRegister(), llvm::getKillRegState(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), II, llvm::isInt(), llvm::isShiftedInt(), llvm::isUInt(), llvm::Kill, MBB, MRI, llvm::MachineInstr::NoFlags, llvm::Offset, Opc, llvm::reportFatalUsageError(), llvm::RISCV::RVVBytesPerBlock, llvm::MachineInstrBuilder::setMIFlag(), TII, llvm::Align::value(), and llvm::MaybeAlign::valueOrOne().

Referenced by llvm::RISCVFrameLowering::allocateStack(), llvm::RISCVFrameLowering::eliminateCallFramePseudoInstr(), eliminateFrameIndex(), and llvm::RISCVFrameLowering::emitEpilogue().

◆ eliminateFrameIndex()

bool RISCVRegisterInfo::eliminateFrameIndex	(	MachineBasicBlock::iterator	MI,
		int	SPAdj,
		unsigned	FIOperandNum,
		RegScavenger *	RS = nullptr ) const

override

◆ findVRegWithEncoding()

MCRegister RISCVRegisterInfo::findVRegWithEncoding	(	const TargetRegisterClass &	RegClass,
		uint16_t	Encoding ) const

Definition at line 1210 of file RISCVRegisterInfo.cpp.

References llvm::RISCVRI::getLMul(), llvm::RISCVVType::LMUL_1, and llvm::MCRegisterClass::TSFlags.

Referenced by lowerSegmentSpillReload().

◆ getCalleeSavedRegs()

const MCPhysReg * RISCVRegisterInfo::getCalleeSavedRegs ( const MachineFunction * MF ) const

override

Definition at line 70 of file RISCVRegisterInfo.cpp.

References assert(), llvm::Function::getCallingConv(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getSubtarget(), llvm::CallingConv::GHC, llvm::Function::hasFnAttribute(), llvm::RISCVABI::isDoubleFP(), llvm::RISCVABI::isPurecap(), llvm::RISCVABI::isRVE(), llvm::RISCVABI::isSingleFP(), llvm::RISCVABI::isSoftFP(), llvm::CallingConv::PreserveMost, llvm::CallingConv::RISCV_VectorCall, Subtarget, and llvm::RISCVABI::Unknown.

◆ getCallPreservedMask()

const uint32_t * RISCVRegisterInfo::getCallPreservedMask	(	const MachineFunction &	MF,
		CallingConv::ID	CC ) const

override

Definition at line 889 of file RISCVRegisterInfo.cpp.

References assert(), CC, llvm::MachineFunction::getSubtarget(), llvm::CallingConv::GHC, llvm::RISCVABI::isDoubleFP(), llvm::RISCVABI::isPurecap(), llvm::RISCVABI::isRVE(), llvm::RISCVABI::isSingleFP(), llvm::RISCVABI::isSoftFP(), llvm::CallingConv::PreserveMost, llvm::CallingConv::RISCV_VectorCall, Subtarget, and llvm::RISCVABI::Unknown.

◆ getConstrainedRegClassForReg()

const TargetRegisterClass * RISCVRegisterInfo::getConstrainedRegClassForReg	(	Register	Reg,
		const MachineRegisterInfo &	MRI ) const

override

Definition at line 116 of file RISCVRegisterInfo.cpp.

References llvm::dyn_cast(), getRegClassForTypeOnBank(), llvm::RISCVSubtarget::is64Bit(), and MRI.

◆ getCSRCost()

unsigned llvm::RISCVRegisterInfo::getCSRCost ( ) const

inlineoverride

Definition at line 74 of file RISCVRegisterInfo.h.

◆ getFrameIndexInstrOffset()

int64_t RISCVRegisterInfo::getFrameIndexInstrOffset	(	const MachineInstr *	MI,
		int	Idx ) const

override

Definition at line 850 of file RISCVRegisterInfo.cpp.

References assert(), llvm::RISCVII::getFormat(), llvm::RISCVII::InstFormatI, llvm::RISCVII::InstFormatS, and MI.

Referenced by isFrameOffsetLegal(), and resolveFrameIndex().

◆ getFrameRegister()

Register RISCVRegisterInfo::getFrameRegister ( const MachineFunction & MF ) const

override

Definition at line 860 of file RISCVRegisterInfo.cpp.

References llvm::TargetFrameLowering::hasFP().

Referenced by adjustReg().

◆ getGPRPairSubRegs()

std::pair< Register, Register > RISCVRegisterInfo::getGPRPairSubRegs ( MCRegister Pair ) const

Definition at line 958 of file RISCVRegisterInfo.cpp.

◆ getIPRACSRegs()

const MCPhysReg * RISCVRegisterInfo::getIPRACSRegs ( const MachineFunction * MF ) const

override

Definition at line 65 of file RISCVRegisterInfo.cpp.

◆ getLargestLegalSuperClass()

const TargetRegisterClass * RISCVRegisterInfo::getLargestLegalSuperClass	(	const TargetRegisterClass *	RC,
		const MachineFunction &	) const

override

Definition at line 915 of file RISCVRegisterInfo.cpp.

◆ getNoPreservedMask()

const uint32_t * RISCVRegisterInfo::getNoPreservedMask ( ) const

override

Definition at line 232 of file RISCVRegisterInfo.cpp.

◆ getOffsetOpcodes()

void RISCVRegisterInfo::getOffsetOpcodes	(	const StackOffset &	Offset,
		SmallVectorImpl< uint64_t > &	Ops ) const

override

Definition at line 930 of file RISCVRegisterInfo.cpp.

References AbstractManglingParser< Derived, Alloc >::Ops, llvm::DIExpression::appendOffset(), assert(), getDwarfRegNum(), and llvm::Offset.

◆ getRegAllocationHints()

bool RISCVRegisterInfo::getRegAllocationHints	(	Register	VirtReg,
		ArrayRef< MCPhysReg >	Order,
		SmallSetVector< MCPhysReg, 16 > &	Hints,
		const MachineFunction &	MF,
		const VirtRegMap *	VRM,
		const LiveRegMatrix *	Matrix ) const

override

◆ getRegAsmName()

StringRef RISCVRegisterInfo::getRegAsmName ( MCRegister Reg ) const

override

Definition at line 882 of file RISCVRegisterInfo.cpp.

References llvm::TargetRegisterInfo::getRegAsmName().

◆ getRegClassForTypeOnBank()

const TargetRegisterClass * RISCVRegisterInfo::getRegClassForTypeOnBank	(	LLT	Ty,
		const RegisterBank &	RB,
		bool	Is64Bit ) const

Definition at line 132 of file RISCVRegisterInfo.cpp.

References llvm::RegisterBank::getID().

Referenced by getConstrainedRegClassForReg().

◆ getRegisterCostTableIndex()

unsigned RISCVRegisterInfo::getRegisterCostTableIndex ( const MachineFunction & MF ) const

override

Definition at line 966 of file RISCVRegisterInfo.cpp.

References llvm::MachineFunction::getFunction(), llvm::MachineFunction::getSubtarget(), and llvm::Function::hasOptSize().

◆ getReservedRegs()

BitVector RISCVRegisterInfo::getReservedRegs ( const MachineFunction & MF ) const

override

Definition at line 165 of file RISCVRegisterInfo.cpp.

References assert(), llvm::RISCVABI::getBPReg(), llvm::Function::getCallingConv(), llvm::MachineFunction::getFunction(), llvm::MachineFunction::getSubtarget(), llvm::CallingConv::GRAAL, llvm::RISCVFrameLowering::hasBP(), llvm::TargetFrameLowering::hasFP(), I, llvm::reportFatalUsageError(), llvm::Reserved, and Subtarget.

◆ getSpillWeightScaleFactor()

float RISCVRegisterInfo::getSpillWeightScaleFactor ( const TargetRegisterClass * RC ) const

override

Definition at line 975 of file RISCVRegisterInfo.cpp.

◆ isArgumentRegister()

bool RISCVRegisterInfo::isArgumentRegister	(	const MachineFunction &	MF,
		MCRegister	Reg ) const

override

Definition at line 865 of file RISCVRegisterInfo.cpp.

References contains(), llvm::RISCV::getArgFPRs(), llvm::RISCV::getArgGPRs(), llvm::RISCV::getArgVRs(), llvm::MachineFunction::getSubtarget(), llvm::is_contained(), RISCVRegisterInfo(), and TRI.

◆ isAsmClobberable()

bool RISCVRegisterInfo::isAsmClobberable	(	const MachineFunction &	MF,
		MCRegister	PhysReg ) const

override

Definition at line 227 of file RISCVRegisterInfo.cpp.

References llvm::MachineFunction::getSubtarget(), and llvm::TargetSubtargetInfo::isRegisterReservedByUser().

◆ isFPRegister()

bool llvm::RISCVRegisterInfo::isFPRegister ( MCRegister Reg )

inlinestatic

Definition at line 190 of file RISCVRegisterInfo.h.

References Reg.

◆ isFrameOffsetLegal()

bool RISCVRegisterInfo::isFrameOffsetLegal	(	const MachineInstr *	MI,
		Register	BaseReg,
		int64_t	Offset ) const

override

Definition at line 795 of file RISCVRegisterInfo.cpp.

References assert(), getFrameIndexInstrOffset(), llvm::isInt(), MI, and llvm::Offset.

Referenced by needsFrameBaseReg().

◆ isRegisterReservedByUser()

bool llvm::RISCVRegisterInfo::isRegisterReservedByUser ( MCRegister Reg ) const

inline

Returns true if Reg is, or overlaps, a register reserved by the reserve-xN features, e.g.

X10_W, X10_H or a GPRPair containing X10.

Definition at line 96 of file RISCVRegisterInfo.h.

References Reg.

Referenced by llvm::RISCVSubtarget::isRegisterReservedByUser().

◆ isRVVRegClass()

bool llvm::RISCVRegisterInfo::isRVVRegClass ( const TargetRegisterClass * RC )

inlinestatic

Definition at line 186 of file RISCVRegisterInfo.h.

References llvm::RISCVRI::isVRegClass(), and llvm::MCRegisterClass::TSFlags.

Referenced by llvm::RISCVFrameLowering::assignCalleeSavedSpillSlots(), llvm::RISCVInstrInfo::copyPhysReg(), llvm::RISCV::isVectorCopy(), llvm::RISCVInstrInfo::isVRegCopy(), llvm::RISCVInstrInfo::loadRegFromStackSlot(), and llvm::RISCVInstrInfo::storeRegToStackSlot().

◆ isVRNRegClass()

bool llvm::RISCVRegisterInfo::isVRNRegClass ( const TargetRegisterClass * RC )

inlinestatic

Definition at line 182 of file RISCVRegisterInfo.h.

References llvm::RISCVRI::getNF(), llvm::RISCVRI::isVRegClass(), and llvm::MCRegisterClass::TSFlags.

◆ isVRRegClass()

bool llvm::RISCVRegisterInfo::isVRRegClass ( const TargetRegisterClass * RC )

inlinestatic

Definition at line 177 of file RISCVRegisterInfo.h.

References llvm::RISCVRI::getNF(), llvm::RISCVRI::isVRegClass(), and llvm::MCRegisterClass::TSFlags.

◆ lowerSegmentSpillReload()

void RISCVRegisterInfo::lowerSegmentSpillReload	(	MachineBasicBlock::iterator	II,
		bool	IsSpill ) const

Definition at line 467 of file RISCVRegisterInfo.cpp.

References _, llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMemOperand(), llvm::MachineInstrBuilder::addReg(), assert(), llvm::sampleprof::Base, llvm::BuildMI(), llvm::RISCVVType::decodeVLMUL(), llvm::details::FixedOrScalableQuantity< LeafTy, ValueTy >::divideCoefficientBy(), DL, findVRegWithEncoding(), llvm::getDefRegState(), llvm::RISCVSubtarget::getInstrInfo(), llvm::getKillRegState(), llvm::MachineFunction::getMachineMemOperand(), llvm::RISCVSubtarget::getRealVLen(), llvm::MachineFunction::getRegInfo(), llvm::RISCVSubtarget::getRegisterInfo(), getSpillReloadInfo(), llvm::MachineFunction::getSubtarget(), llvm::LocationSize::getValue(), I, II, llvm::Implicit, llvm::details::FixedOrScalableQuantity< LeafTy, ValueTy >::isKnownMultipleOf(), llvm::LocationSize::isPrecise(), llvm::RISCV::isRVVSpillForZvlsseg(), llvm::Kill, llvm::Log2_32(), MBB, llvm::RISCVInstrInfo::movImm(), MRI, llvm::Offset, TII, and TRI.

Referenced by eliminateFrameIndex().

◆ materializeFrameBaseRegister()

Register RISCVRegisterInfo::materializeFrameBaseRegister	(	MachineBasicBlock *	MBB,
		int	FrameIdx,
		int64_t	Offset ) const

override

Definition at line 812 of file RISCVRegisterInfo.cpp.

References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), DL, llvm::TargetSubtargetInfo::getInstrInfo(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), MBB, MBBI, llvm::Offset, and TII.

◆ needsFrameBaseReg()

bool RISCVRegisterInfo::needsFrameBaseReg	(	MachineInstr *	MI,
		int64_t	Offset ) const

override

Definition at line 733 of file RISCVRegisterInfo.cpp.

References assert(), contains(), llvm::RISCVII::getFormat(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFrameInfo::getLocalFrameSize(), llvm::MachineFunction::getRegInfo(), llvm::MachineFunction::getSubtarget(), llvm::TargetFrameLowering::hasFP(), llvm::RISCVII::InstFormatI, llvm::RISCVII::InstFormatS, isFrameOffsetLegal(), MI, MRI, llvm::Offset, and Subtarget.

◆ requiresFrameIndexScavenging()

bool llvm::RISCVRegisterInfo::requiresFrameIndexScavenging ( const MachineFunction & MF ) const

inlineoverride

Definition at line 147 of file RISCVRegisterInfo.h.

◆ requiresRegisterScavenging()

bool llvm::RISCVRegisterInfo::requiresRegisterScavenging ( const MachineFunction & MF ) const

inlineoverride

Definition at line 143 of file RISCVRegisterInfo.h.

◆ requiresVirtualBaseRegisters()

bool RISCVRegisterInfo::requiresVirtualBaseRegisters ( const MachineFunction & MF ) const

override

Definition at line 724 of file RISCVRegisterInfo.cpp.

◆ resolveFrameIndex()

void RISCVRegisterInfo::resolveFrameIndex	(	MachineInstr &	MI,
		Register	BaseReg,
		int64_t	Offset ) const

override

Definition at line 832 of file RISCVRegisterInfo.cpp.

References assert(), getFrameIndexInstrOffset(), MI, and llvm::Offset.

◆ updateRegAllocHint()

void RISCVRegisterInfo::updateRegAllocHint	(	Register	Reg,
		Register	NewReg,
		MachineFunction &	MF ) const

override

Definition at line 1180 of file RISCVRegisterInfo.cpp.

References llvm::MachineFunction::getRegInfo(), llvm::Register::isVirtual(), MRI, llvm::RISCVRI::RegPairEven, and llvm::RISCVRI::RegPairOdd.

The documentation for this struct was generated from the following files:

lib/Target/RISCV/RISCVRegisterInfo.h
lib/Target/RISCV/RISCVRegisterInfo.cpp

Public Member Functions

Static Public Member Functions

Detailed Description

Constructor & Destructor Documentation

◆ RISCVRegisterInfo()

Member Function Documentation

◆ adjustReg()

◆ eliminateFrameIndex()

◆ findVRegWithEncoding()

◆ getCalleeSavedRegs()

◆ getCallPreservedMask()

◆ getConstrainedRegClassForReg()

◆ getCSRCost()

◆ getFrameIndexInstrOffset()

◆ getFrameRegister()

◆ getGPRPairSubRegs()

◆ getIPRACSRegs()

◆ getLargestLegalSuperClass()

◆ getNoPreservedMask()

◆ getOffsetOpcodes()

◆ getRegAllocationHints()

◆ getRegAsmName()

◆ getRegClassForTypeOnBank()

◆ getRegisterCostTableIndex()

◆ getReservedRegs()

◆ getSpillWeightScaleFactor()

◆ isArgumentRegister()

◆ isAsmClobberable()

◆ isFPRegister()

◆ isFrameOffsetLegal()

◆ isRegisterReservedByUser()

◆ isRVVRegClass()

◆ isVRNRegClass()

◆ isVRRegClass()

◆ lowerSegmentSpillReload()

◆ materializeFrameBaseRegister()

◆ needsFrameBaseReg()

◆ requiresFrameIndexScavenging()

◆ requiresRegisterScavenging()

◆ requiresVirtualBaseRegisters()

◆ resolveFrameIndex()

◆ updateRegAllocHint()