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LLVM 24.0.0git
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Enumerations | |
| enum class | ABI { ILP32 , ILP32F , ILP32D , ILP32E , IL32PC64 , IL32PC64F , IL32PC64D , IL32PC64E , LP64 , LP64F , LP64D , LP64E , L64PC128 , L64PC128F , L64PC128D , CHERIOT , Unknown } |
Functions | |
| Expected< ABI > | computeTargetABI (const MCSubtargetInfo &STI, StringRef ABIName) |
| ABI | getTargetABI (StringRef ABIName) |
| MCRegister | getBPReg () |
| MCRegister | getSCSPReg () |
| bool | isSoftFP (ABI TargetABI) |
| bool | isSingleFP (ABI TargetABI) |
| bool | isDoubleFP (ABI TargetABI) |
| bool | isRVE (ABI TargetABI) |
| bool | isPurecap (ABI TargetABI) |
| Align | getStackAlignment (ABI TargetABI) |
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strong |
| Enumerator | |
|---|---|
| ILP32 | |
| ILP32F | |
| ILP32D | |
| ILP32E | |
| IL32PC64 | |
| IL32PC64F | |
| IL32PC64D | |
| IL32PC64E | |
| LP64 | |
| LP64F | |
| LP64D | |
| LP64E | |
| L64PC128 | |
| L64PC128F | |
| L64PC128D | |
| CHERIOT | |
| Unknown | |
Definition at line 717 of file RISCVBaseInfo.h.
| Expected< ABI > llvm::RISCVABI::computeTargetABI | ( | const MCSubtargetInfo & | STI, |
| StringRef | ABIName ) |
Definition at line 54 of file RISCVBaseInfo.cpp.
References CHERIOT, llvm::createStringError(), llvm::StringRef::empty(), llvm::MCSubtargetInfo::getFeatureBits(), getTargetABI(), llvm::MCSubtargetInfo::getTargetTriple(), ILP32E, isDoubleFP(), isSingleFP(), LP64E, llvm::RISCVFeatures::parseFeatureBits(), llvm::reportFatalUsageError(), llvm::StringRef::starts_with(), and Unknown.
| MCRegister llvm::RISCVABI::getBPReg | ( | ) |
Definition at line 144 of file RISCVBaseInfo.cpp.
Referenced by llvm::RISCVFrameLowering::determineCalleeSaves(), llvm::RISCVFrameLowering::emitPrologue(), llvm::RISCVFrameLowering::getFrameIndexReference(), and llvm::RISCVRegisterInfo::getReservedRegs().
| MCRegister llvm::RISCVABI::getSCSPReg | ( | ) |
Definition at line 147 of file RISCVBaseInfo.cpp.
Referenced by emitSCSEpilogue(), and emitSCSPrologue().
Definition at line 119 of file RISCVBaseInfo.cpp.
References llvm::StringSwitch< T, R >::Case(), CHERIOT, llvm::StringSwitch< T, R >::Default(), IL32PC64, IL32PC64D, IL32PC64E, IL32PC64F, ILP32, ILP32D, ILP32E, ILP32F, L64PC128, L64PC128D, L64PC128F, LP64, LP64D, LP64E, LP64F, and Unknown.
Referenced by computeTargetABI().
Definition at line 773 of file RISCVBaseInfo.h.
References IL32PC64D, ILP32D, L64PC128D, and LP64D.
Referenced by CC_RISCV_Impl(), computeTargetABI(), llvm::RISCVTargetELFStreamer::finish(), llvm::RISCVRegisterInfo::getCalleeSavedRegs(), and llvm::RISCVRegisterInfo::getCallPreservedMask().
Definition at line 799 of file RISCVBaseInfo.h.
References CHERIOT, IL32PC64, IL32PC64D, IL32PC64E, IL32PC64F, L64PC128, L64PC128D, and L64PC128F.
Referenced by CC_RISCV_Impl(), llvm::RISCVRegisterInfo::getCalleeSavedRegs(), llvm::RISCVRegisterInfo::getCallPreservedMask(), and llvm::RISCVTargetLowering::RISCVTargetLowering().
Definition at line 786 of file RISCVBaseInfo.h.
References CHERIOT, IL32PC64E, ILP32E, and LP64E.
Referenced by CC_RISCV_Impl(), CC_RISCVAssign2XLen(), llvm::RISCVTargetELFStreamer::finish(), getArgGPR16s(), getArgGPR32s(), llvm::RISCV::getArgGPRs(), llvm::RISCVRegisterInfo::getCalleeSavedRegs(), llvm::RISCVRegisterInfo::getCallPreservedMask(), getFastCCArgGPRF16s(), getFastCCArgGPRF32s(), and getFastCCArgGPRs().
Definition at line 758 of file RISCVBaseInfo.h.
References IL32PC64F, ILP32F, L64PC128F, and LP64F.
Referenced by CC_RISCV_Impl(), computeTargetABI(), llvm::RISCVTargetELFStreamer::finish(), llvm::RISCVRegisterInfo::getCalleeSavedRegs(), and llvm::RISCVRegisterInfo::getCallPreservedMask().
Definition at line 739 of file RISCVBaseInfo.h.
References CHERIOT, IL32PC64, IL32PC64E, ILP32, ILP32E, L64PC128, LP64, and LP64E.
Referenced by llvm::RISCVTargetELFStreamer::finish(), llvm::RISCVRegisterInfo::getCalleeSavedRegs(), llvm::RISCVRegisterInfo::getCallPreservedMask(), and llvm::RISCVSubtarget::isSoftFPABI().