91#define DEBUG_TYPE "shrink-wrap"
94STATISTIC(NumCandidates,
"Number of shrink-wrapping candidates");
96 "Number of shrink-wrapping candidates dropped because of frequency");
100 cl::desc(
"enable the shrink-wrapping pass"));
103 cl::desc(
"enable splitting of the restore block if possible"));
114class ShrinkWrapImpl {
145 unsigned FrameSetupOpcode = ~0u;
148 unsigned FrameDestroyOpcode = ~0u;
159 mutable SetOfRegs CurrentCSRs;
175 bool StackAddressUsed)
const;
177 const SetOfRegs &getCurrentCSRs(
RegScavenger *RS)
const {
178 if (CurrentCSRs.empty()) {
187 CurrentCSRs.insert((
unsigned)
Reg);
197 void updateSaveRestorePoints(MachineBasicBlock &
MBB, RegScavenger *RS);
201 bool performShrinkWrapping(
202 const ReversePostOrderTraversal<MachineBasicBlock *> &RPOT,
207 bool postShrinkWrapping(
bool HasCandidate, MachineFunction &MF,
218 bool checkIfRestoreSplittable(
219 const MachineBasicBlock *CurRestore,
220 const DenseSet<const MachineBasicBlock *> &ReachableByDirty,
221 SmallVectorImpl<MachineBasicBlock *> &DirtyPreds,
222 SmallVectorImpl<MachineBasicBlock *> &CleanPreds,
223 const TargetInstrInfo *
TII, RegScavenger *RS);
226 void init(MachineFunction &MF) {
227 RCI.runOnMachineFunction(MF);
230 EntryFreq = MBFI->getEntryFreq();
231 const TargetSubtargetInfo &Subtarget = MF.
getSubtarget();
233 FrameSetupOpcode =
TII.getCallFrameSetupOpcode();
234 FrameDestroyOpcode =
TII.getCallFrameDestroyOpcode();
245 bool ArePointsInteresting()
const {
return Save != Entry && Save && Restore; }
248 ShrinkWrapImpl(MachineDominatorTree *MDT, MachinePostDominatorTree *MPDT,
249 MachineBlockFrequencyInfo *MBFI, MachineLoopInfo *MLI,
250 MachineOptimizationRemarkEmitter *ORE)
251 : MDT(MDT), MPDT(MPDT), MBFI(MBFI), MLI(MLI), ORE(ORE) {}
254 static bool isShrinkWrapEnabled(
const MachineFunction &MF);
256 bool run(MachineFunction &MF);
263 ShrinkWrapLegacy() : MachineFunctionPass(ID) {}
265 void getAnalysisUsage(AnalysisUsage &AU)
const override {
267 AU.
addRequired<MachineBlockFrequencyInfoWrapperPass>();
269 AU.
addRequired<MachinePostDominatorTreeWrapperPass>();
271 AU.
addRequired<MachineOptimizationRemarkEmitterPass>();
275 MachineFunctionProperties getRequiredProperties()
const override {
276 return MachineFunctionProperties().setNoVRegs();
279 StringRef getPassName()
const override {
return "Shrink Wrapping analysis"; }
283 bool runOnMachineFunction(MachineFunction &MF)
override;
288char ShrinkWrapLegacy::ID = 0;
303 bool StackAddressUsed)
const {
311 if (
Op->getValue()) {
316 return !Arg->hasPassPointeeByValueCopyAttr();
320 return PSV->isJumpTable() || PSV->isConstantPool();
325 if (StackAddressUsed &&
MI.mayLoadOrStore() &&
326 (
MI.isCall() ||
MI.hasUnmodeledSideEffects() ||
MI.memoperands_empty() ||
327 !
all_of(
MI.memoperands(), IsKnownNonStackPtr)))
330 if (
MI.getOpcode() == FrameSetupOpcode ||
331 MI.getOpcode() == FrameDestroyOpcode) {
332 LLVM_DEBUG(dbgs() <<
"Frame instruction: " << MI <<
'\n');
338 bool UseOrDefCSR = false;
341 if (!MO.isDef() && !MO.readsReg())
343 Register PhysReg = MO.getReg();
346 assert(PhysReg.isPhysical() &&
"Unallocated register?!");
359 UseOrDefCSR = (!MI.isCall() && PhysReg == SP) ||
360 RCI.getLastCalleeSavedAlias(PhysReg) ||
362 TRI->isNonallocatableRegisterCalleeSave(PhysReg)) ||
363 TRI->isVirtualFrameRegister(PhysReg);
364 }
else if (MO.isRegMask()) {
366 for (unsigned Reg : getCurrentCSRs(RS)) {
367 if (MO.clobbersPhysReg(Reg)) {
374 if (UseOrDefCSR || (MO.isFI() && !
MI.isDebugValue())) {
375 LLVM_DEBUG(dbgs() <<
"Use or define CSR(" << UseOrDefCSR <<
") or FI("
376 << MO.isFI() <<
"): " << MI <<
'\n');
384template <
typename ListOfBBs,
typename DominanceAnalysis>
386 DominanceAnalysis &Dom,
bool Strict =
true) {
387 if (BBs.begin() == BBs.end())
400 return !
TII.analyzeBranch(Entry,
TBB, FBB,
Cond);
411 if (ReachableByDirty.
count(PredBB))
421 while (!Worklist.
empty()) {
423 if (!Visited.
insert(SuccMBB).second)
448 while (!Worklist.
empty()) {
450 if (CleanBB == SavePoint)
476 TII->insertUnconditionalBranch(*BBToUpdate, NMBB,
DL);
501 if (BB->getFallThrough(
false) ==
MBB)
502 MBBFallthrough.
insert(BB);
517 SuccBB->ReplaceUsesOfBlockWith(
MBB, NMBB);
542 if (BB->getFallThrough(
false) == NMBB)
543 NMBBFallthrough.
insert(BB);
547 SuccBB->ReplaceUsesOfBlockWith(NMBB,
MBB);
559bool ShrinkWrapImpl::checkIfRestoreSplittable(
565 for (
const MachineInstr &
MI : *CurRestore)
566 if (useOrDefCSROrFI(
MI, RS,
true))
569 for (MachineBasicBlock *PredBB : CurRestore->predecessors()) {
573 if (ReachableByDirty.
count(PredBB))
579 return !(CleanPreds.
empty() || DirtyPreds.
empty());
582bool ShrinkWrapImpl::postShrinkWrapping(
bool HasCandidate, MachineFunction &MF,
587 MachineBasicBlock *InitSave =
nullptr;
588 MachineBasicBlock *InitRestore =
nullptr;
592 InitRestore = Restore;
594 InitRestore =
nullptr;
595 InitSave = &MF.
front();
596 for (MachineBasicBlock &
MBB : MF) {
608 if (!InitSave || !InitRestore || InitRestore == InitSave ||
609 !MDT->
dominates(InitSave, InitRestore) ||
615 for (MachineBasicBlock &
MBB : MF)
619 DenseSet<const MachineBasicBlock *> DirtyBBs;
620 for (MachineBasicBlock &
MBB : MF) {
627 for (
const MachineInstr &
MI :
MBB)
628 if (useOrDefCSROrFI(
MI, RS,
true)) {
635 DenseSet<const MachineBasicBlock *> ReachableByDirty;
638 const TargetInstrInfo *
TII = MF.getSubtarget().getInstrInfo();
641 if (!checkIfRestoreSplittable(InitRestore, ReachableByDirty, DirtyPreds,
642 CleanPreds,
TII, RS))
646 MachineBasicBlock *NewSave =
649 while (NewSave && (
hasDirtyPred(ReachableByDirty, *NewSave) ||
650 EntryFreq < MBFI->getBlockFreq(NewSave) ||
658 if (ReachablePreds.
empty())
665 const TargetFrameLowering *TFI = MF.getSubtarget().getFrameLowering();
666 if (!NewSave || NewSave == InitSave ||
673 MachineBasicBlock *NewRestore =
684 Restore = NewRestore;
690 "Incorrect save or restore point due to dominance relations");
692 "Unexpected save or restore point in a loop");
695 "Incorrect save or restore point based on block frequency");
699void ShrinkWrapImpl::updateSaveRestorePoints(MachineBasicBlock &
MBB,
721 if (Restore == &
MBB) {
723 if (!useOrDefCSROrFI(Terminator, RS,
true))
739 dbgs() <<
"Restore point needs to be spanned on several blocks\n");
750 bool SaveDominatesRestore =
false;
751 bool RestorePostDominatesSave =
false;
753 (!(SaveDominatesRestore = MDT->
dominates(Save, Restore)) ||
754 !(RestorePostDominatesSave = MPDT->
dominates(Restore, Save)) ||
774 if (!SaveDominatesRestore) {
779 if (!RestorePostDominatesSave)
797 SmallVector<MachineBasicBlock*, 4> ExitBlocks;
801 MachineBasicBlock *IPdom = Restore;
802 for (MachineBasicBlock *LoopExitBB: ExitBlocks) {
803 IPdom =
FindIDom<>(*IPdom, LoopExitBB->successors(), *MPDT);
834bool ShrinkWrapImpl::performShrinkWrapping(
835 const ReversePostOrderTraversal<MachineBasicBlock *> &RPOT,
837 for (MachineBasicBlock *
MBB : RPOT) {
842 "EH Funclets are not supported yet.",
851 updateSaveRestorePoints(*
MBB, RS);
852 if (!ArePointsInteresting()) {
853 LLVM_DEBUG(
dbgs() <<
"EHPad/inlineasm_br prevents shrink-wrapping\n");
859 bool StackAddressUsed =
false;
866 if (StackAddressUsedBlockInfo.
test(Pred->getNumber())) {
867 StackAddressUsed =
true;
872 for (
const MachineInstr &
MI : *
MBB) {
873 if (useOrDefCSROrFI(
MI, RS, StackAddressUsed)) {
876 updateSaveRestorePoints(*
MBB, RS);
879 if (!ArePointsInteresting()) {
885 StackAddressUsed =
true;
889 StackAddressUsedBlockInfo[
MBB->
getNumber()] = StackAddressUsed;
891 if (!ArePointsInteresting()) {
895 assert(!Save && !Restore &&
"We miss a shrink-wrap opportunity?!");
903 const TargetFrameLowering *TFI =
906 LLVM_DEBUG(
dbgs() <<
"Shrink wrap candidates (#, Name, Freq):\nSave: "
912 bool IsSaveCheap, TargetCanUseSaveAsPrologue =
false;
913 if (((IsSaveCheap = EntryFreq >= MBFI->
getBlockFreq(Save)) &&
919 dbgs() <<
"New points are too expensive or invalid for the target\n");
920 MachineBasicBlock *NewBB;
921 if (!IsSaveCheap || !TargetCanUseSaveAsPrologue) {
933 updateSaveRestorePoints(*NewBB, RS);
934 }
while (Save && Restore);
936 if (!ArePointsInteresting()) {
937 ++NumCandidatesDropped;
943bool ShrinkWrapImpl::run(MachineFunction &MF) {
948 ReversePostOrderTraversal<MachineBasicBlock *> RPOT(&*MF.
begin());
957 "Irreducible CFGs are not supported yet.",
962 std::unique_ptr<RegScavenger>
RS(
963 TRI->requiresRegisterScavenging(MF) ?
new RegScavenger() :
nullptr);
971 bool HasCandidate = performShrinkWrapping(RPOT,
RS.get());
972 StackAddressUsedBlockInfo.
clear();
973 Changed = postShrinkWrapping(HasCandidate, MF,
RS.get());
976 if (!ArePointsInteresting())
996bool ShrinkWrapLegacy::runOnMachineFunction(MachineFunction &MF) {
998 !ShrinkWrapImpl::isShrinkWrapEnabled(MF))
1001 MachineDominatorTree *MDT =
1002 &getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();
1003 MachinePostDominatorTree *MPDT =
1004 &getAnalysis<MachinePostDominatorTreeWrapperPass>().getPostDomTree();
1005 MachineBlockFrequencyInfo *MBFI =
1006 &getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI();
1007 MachineLoopInfo *MLI = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
1008 MachineOptimizationRemarkEmitter *ORE =
1009 &getAnalysis<MachineOptimizationRemarkEmitterPass>().getORE();
1011 return ShrinkWrapImpl(MDT, MPDT, MBFI, MLI, ORE).run(MF);
1017 if (MF.
empty() || !ShrinkWrapImpl::isShrinkWrapEnabled(MF))
1029 ShrinkWrapImpl(&MDT, &MPDT, &MBFI, &MLI, &ORE).
run(MF);
1046 !(MF.
getFunction().hasFnAttribute(Attribute::SanitizeAddress) ||
for(const MachineOperand &MO :llvm::drop_begin(OldMI.operands(), Desc.getNumOperands()))
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
This file contains the simple types necessary to represent the attributes associated with functions a...
This file implements the BitVector class.
const HexagonInstrInfo * TII
Register const TargetRegisterInfo * TRI
#define INITIALIZE_PASS_DEPENDENCY(depName)
#define INITIALIZE_PASS_END(passName, arg, name, cfg, analysis)
#define INITIALIZE_PASS_BEGIN(passName, arg, name, cfg, analysis)
This file builds on the ADT/GraphTraits.h file to build a generic graph post order iterator.
const SmallVectorImpl< MachineOperand > MachineBasicBlock * TBB
const SmallVectorImpl< MachineOperand > & Cond
This file declares the machine register scavenger class.
This file implements a set that has insertion order iteration characteristics.
static void markAllReachable(DenseSet< const MachineBasicBlock * > &Visited, const MachineBasicBlock &MBB)
Derives the list of all the basic blocks reachable from MBB.
static void updateTerminator(MachineBasicBlock *BBToUpdate, MachineBasicBlock *NMBB, const TargetInstrInfo *TII)
This function updates the branches post restore point split.
static MachineBasicBlock * tryToSplitRestore(MachineBasicBlock *MBB, ArrayRef< MachineBasicBlock * > DirtyPreds, const TargetInstrInfo *TII)
This function splits the restore point and returns new restore point/BB.
static bool hasDirtyPred(const DenseSet< const MachineBasicBlock * > &ReachableByDirty, const MachineBasicBlock &MBB)
Determines if any predecessor of MBB is on the path from block that has use or def of CSRs/FI to MBB.
static bool giveUpWithRemarks(MachineOptimizationRemarkEmitter *ORE, StringRef RemarkName, StringRef RemarkMessage, const DiagnosticLocation &Loc, const MachineBasicBlock *MBB)
static cl::opt< bool > EnablePostShrinkWrapOpt("enable-shrink-wrap-region-split", cl::init(true), cl::Hidden, cl::desc("enable splitting of the restore block if possible"))
static void rollbackRestoreSplit(MachineFunction &MF, MachineBasicBlock *NMBB, MachineBasicBlock *MBB, ArrayRef< MachineBasicBlock * > DirtyPreds, const TargetInstrInfo *TII)
This function undoes the restore point split done earlier.
static bool isAnalyzableBB(const TargetInstrInfo &TII, MachineBasicBlock &Entry)
static bool isSaveReachableThroughClean(const MachineBasicBlock *SavePoint, ArrayRef< MachineBasicBlock * > CleanPreds)
static cl::opt< cl::boolOrDefault > EnableShrinkWrapOpt("enable-shrink-wrap", cl::Hidden, cl::desc("enable the shrink-wrapping pass"))
static void collectBlocksReachableByDirty(const DenseSet< const MachineBasicBlock * > &DirtyBBs, DenseSet< const MachineBasicBlock * > &ReachableByDirty)
Collect blocks reachable by use or def of CSRs/FI.
static MachineBasicBlock * FindIDom(MachineBasicBlock &Block, ListOfBBs BBs, DominanceAnalysis &Dom, bool Strict=true)
Helper function to find the immediate (post) dominator.
This file defines the SmallVector class.
This file defines the 'Statistic' class, which is designed to be an easy way to expose various metric...
#define STATISTIC(VARNAME, DESC)
This file describes how to lower LLVM code to machine code.
PassT::Result & getResult(IRUnitT &IR, ExtraArgTs... ExtraArgs)
Get the result of an analysis pass for a given IR unit.
AnalysisUsage & addRequired()
void setPreservesAll()
Set by analyses that do not transform their input at all.
Represent a constant reference to an array (0 or more elements consecutively in memory),...
bool test(unsigned Idx) const
Returns true if bit Idx is set.
int find_first() const
Returns the index of the first set bit, -1 if none of the bits are set.
void resize(unsigned N, bool t=false)
Grow or shrink the bitvector.
void clear()
Removes all bits from the bitvector.
int find_next(unsigned Prev) const
Returns the index of the next set bit following the "Prev" bit.
uint64_t getFrequency() const
Returns the frequency as a fixpoint number scaled by the entry frequency.
Implements a dense probed hash-table based set.
NodeT * findNearestCommonDominator(NodeT *A, NodeT *B) const
Find nearest common dominator basic block for basic block A and B.
bool dominates(const DomTreeNodeBase< NodeT > *A, const DomTreeNodeBase< NodeT > *B) const
dominates - Returns true iff A dominates B.
void recalculate(ParentType &Func)
recalculate - compute a dominator tree for the given function
bool isReachableFromEntry(const NodeT *A) const
isReachableFromEntry - Return true if A is dominated by the entry block of the function containing it...
DomTreeNodeBase< NodeT > * getNode(const NodeT *BB) const
getNode - return the (Post)DominatorTree node for the specified basic block.
DISubprogram * getSubprogram() const
Get the attached subprogram.
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
void getExitingBlocks(SmallVectorImpl< BlockT * > &ExitingBlocks) const
Return all blocks inside the loop that have successors outside of the loop.
unsigned getLoopDepth(const BlockT *BB) const
Return the loop nesting level of the specified block.
LoopT * getLoopFor(const BlockT *BB) const
Return the inner most loop that BB lives in.
bool usesWindowsCFI() const
An RAII based helper class to modify MachineFunctionProperties when running pass.
bool isInlineAsmBrIndirectTarget() const
Returns true if this is the indirect dest of an INLINEASM_BR.
unsigned pred_size() const
bool isEHPad() const
Returns true if the block is a landing pad.
int getNumber() const
MachineBasicBlocks are uniquely numbered at the function level, unless they're not in a MachineFuncti...
succ_iterator succ_begin()
bool isEHFuncletEntry() const
Returns true if this is the entry block of an EH funclet.
bool isReturnBlock() const
Convenience function that returns true if the block ends in a return instruction.
LLVM_ABI void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
LLVM_ABI void removeSuccessor(MachineBasicBlock *Succ, bool NormalizeSuccProbs=false)
Remove successor from the successors list of this MachineBasicBlock.
pred_iterator pred_begin()
LLVM_ABI bool isLayoutSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB will be emitted immediately after this block, such that if this bloc...
LLVM_ABI void eraseFromParent()
This method unlinks 'this' from the containing function and deletes it.
void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
LLVM_ABI instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
iterator_range< iterator > terminators()
LLVM_ABI DebugLoc findBranchDebugLoc()
Find and return the merged DebugLoc of the branch instructions of the block.
iterator_range< succ_iterator > successors()
iterator_range< pred_iterator > predecessors()
MachineBlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate machine basic b...
LLVM_ABI BlockFrequency getBlockFreq(const MachineBasicBlock *MBB) const
getblockFreq - Return block frequency.
Analysis pass which computes a MachineDominatorTree.
Analysis pass which computes a MachineDominatorTree.
DominatorTree Class - Concrete subclass of DominatorTreeBase that is used to compute a normal dominat...
bool dominates(const MachineInstr *A, const MachineInstr *B) const
void setSavePoints(SaveRestorePoints NewSavePoints)
void setRestorePoints(SaveRestorePoints NewRestorePoints)
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Function & getFunction()
Return the LLVM function that this machine code represents.
unsigned getNumBlockIDs() const
getNumBlockIDs - Return the number of MBB ID's allocated.
const MachineBasicBlock & front() const
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *BB=nullptr, std::optional< UniqueBBID > BBID=std::nullopt)
CreateMachineInstr - Allocate a new MachineInstr.
void insert(iterator MBBI, MachineBasicBlock *MBB)
const TargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
Representation of each machine instruction.
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
Analysis pass that exposes the MachineLoopInfo for a machine function.
A description of a memory reference used in the backend.
MachineOperand class - Representation of each machine instruction operand.
MachinePostDominatorTree - an analysis pass wrapper for DominatorTree used to compute the post-domina...
LLVM_ABI MachineBasicBlock * findNearestCommonDominator(ArrayRef< MachineBasicBlock * > Blocks) const
Returns the nearest common dominator of the given blocks.
A set of analyses that are preserved following a run of a transformation pass.
static PreservedAnalyses all()
Construct a special preserved set that preserves all passes.
Special value supplied for machine level alias analysis.
Wrapper class representing virtual and physical registers.
LLVM_ABI PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM)
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
A SetVector that performs no allocations if smaller than a certain size.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
void append(ItTy in_start, ItTy in_end)
Add the specified range to the end of the SmallVector.
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Represent a constant reference to a string, i.e.
Information about stack frame layout on the target.
virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
virtual bool enableShrinkWrapping(const MachineFunction &MF) const
Returns true if the target will correctly handle shrink wrapping.
virtual bool canUseAsEpilogue(const MachineBasicBlock &MBB) const
Check whether or not the given MBB can be used as a epilogue for the target.
virtual bool canUseAsPrologue(const MachineBasicBlock &MBB) const
Check whether or not the given MBB can be used as a prologue for the target.
TargetInstrInfo - Interface to description of machine instruction set.
Register getStackPointerRegisterToSaveRestore() const
If a physical register, this specifies the register that llvm.savestack/llvm.restorestack should save...
const MCAsmInfo & getMCAsmInfo() const
Return target specific asm information.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
virtual const TargetFrameLowering * getFrameLowering() const
virtual const TargetInstrInfo * getInstrInfo() const
virtual const TargetRegisterInfo * getRegisterInfo() const =0
Return the target's register information.
virtual const TargetLowering * getTargetLowering() const
LLVM Value Representation.
std::pair< iterator, bool > insert(const ValueT &V)
size_type count(const_arg_type_t< ValueT > V) const
Return 1 if the specified key is in the set, 0 otherwise.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
initializer< Ty > init(const Ty &Val)
DXILDebugInfoMap run(Module &M)
This is an optimization pass for GlobalISel generic memory operations.
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
AnalysisManager< MachineFunction > MachineFunctionAnalysisManager
LLVM_ABI char & ShrinkWrapID
ShrinkWrap pass. Look for the best place to insert save and restore.
bool containsIrreducibleCFG(RPOTraversalT &RPOTraversal, const LoopInfoT &LI)
Return true if the control flow in RPOTraversal is irreducible.
DenseMap< MachineBasicBlock *, std::vector< CalleeSavedInfo > > SaveRestorePoints
LLVM_ABI raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
class LLVM_GSL_OWNER SmallVector
Forward declaration of SmallVector so that calculateSmallVectorDefaultInlinedElements can reference s...
bool isa(const From &Val)
isa<X> - Return true if the parameter to the template is an instance of one of the template type argu...
iterator_range(Container &&) -> iterator_range< llvm::detail::IterOfRange< Container > >
DWARFExpression::Operation Op
LLVM_ABI Printable printBlockFreq(const BlockFrequencyInfo &BFI, BlockFrequency Freq)
Print the block frequency Freq relative to the current functions entry frequency.
LLVM_ABI const Value * getUnderlyingObject(const Value *V, unsigned MaxLookup=MaxLookupSearchDepth)
This method strips off any GEP address adjustments, pointer casts or llvm.threadlocal....
LLVM_ABI Printable printMBBReference(const MachineBasicBlock &MBB)
Prints a machine basic block reference.
Pair of physical register and lane mask.