LLVM 23.0.0git
ARMTargetMachine.cpp File Reference
#include "ARMTargetMachine.h"
#include "ARM.h"
#include "ARMLatencyMutations.h"
#include "ARMMachineFunctionInfo.h"
#include "ARMMacroFusion.h"
#include "ARMSubtarget.h"
#include "ARMTargetObjectFile.h"
#include "ARMTargetTransformInfo.h"
#include "MCTargetDesc/ARMMCTargetDesc.h"
#include "TargetInfo/ARMTargetInfo.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/Analysis/TargetTransformInfo.h"
#include "llvm/CodeGen/ExecutionDomainFix.h"
#include "llvm/CodeGen/GlobalISel/CSEInfo.h"
#include "llvm/CodeGen/GlobalISel/CallLowering.h"
#include "llvm/CodeGen/GlobalISel/IRTranslator.h"
#include "llvm/CodeGen/GlobalISel/InstructionSelect.h"
#include "llvm/CodeGen/GlobalISel/Legalizer.h"
#include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
#include "llvm/CodeGen/GlobalISel/RegBankSelect.h"
#include "llvm/CodeGen/MIRParser/MIParser.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineScheduler.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/TargetPassConfig.h"
#include "llvm/IR/Attributes.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/IR/Function.h"
#include "llvm/MC/TargetRegistry.h"
#include "llvm/Pass.h"
#include "llvm/Passes/PassBuilder.h"
#include "llvm/Support/CodeGen.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Target/TargetLoweringObjectFile.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/TargetParser/ARMTargetParser.h"
#include "llvm/TargetParser/TargetParser.h"
#include "llvm/TargetParser/Triple.h"
#include "llvm/Transforms/CFGuard.h"
#include "llvm/Transforms/IPO.h"
#include "llvm/Transforms/Scalar.h"
#include <cassert>
#include <memory>
#include <optional>
#include <string>
#include "llvm/Passes/TargetPassRegistry.inc"

Go to the source code of this file.

Namespaces

namespace  llvm
 This is an optimization pass for GlobalISel generic memory operations.

Macros

#define GET_PASS_REGISTRY   "ARMPassRegistry.def"
#define ADD_CLASS_PASS_TO_PASS_NAME(NAME, CREATE_PASS)
#define ADD_CLASS_PASS_TO_PASS_NAME_WITH_PARAMS(NAME, CLASS)
#define MODULE_ANALYSIS(NAME, CREATE_PASS)
#define MODULE_PASS(NAME, CREATE_PASS)
#define MODULE_PASS_WITH_PARAMS(NAME, CLASS, CREATE_PASS, PARSER, PARAMS)
#define FUNCTION_ANALYSIS(NAME, CREATE_PASS)
#define FUNCTION_ALIAS_ANALYSIS(NAME, CREATE_PASS)
#define FUNCTION_PASS(NAME, CREATE_PASS)
#define FUNCTION_PASS_WITH_PARAMS(NAME, CLASS, CREATE_PASS, PARSER, PARAMS)
#define LOOP_ANALYSIS(NAME, CREATE_PASS)
#define LOOP_PASS(NAME, CREATE_PASS)
#define MACHINE_FUNCTION_ANALYSIS(NAME, CREATE_PASS)
#define MACHINE_FUNCTION_PASS(NAME, CREATE_PASS)
#define MACHINE_FUNCTION_PASS_WITH_PARAMS(NAME, CLASS, CREATE_PASS, PARSER, PARAMS)
#define ADD_PASS(NAME, CREATE_PASS)
#define ADD_PASS_WITH_PARAMS(NAME, CREATE_PASS, PARSER)
#define MODULE_PASS(NAME, CREATE_PASS)
#define MODULE_PASS_WITH_PARAMS(NAME, CLASS, CREATE_PASS, PARSER, PARAMS)
#define FUNCTION_PASS(NAME, CREATE_PASS)
#define FUNCTION_PASS_WITH_PARAMS(NAME, CLASS, CREATE_PASS, PARSER, PARAMS)
#define LOOP_PASS(NAME, CREATE_PASS)
#define MACHINE_FUNCTION_PASS(NAME, CREATE_PASS)
#define MACHINE_FUNCTION_PASS_WITH_PARAMS(NAME, CLASS, CREATE_PASS, PARSER, PARAMS)
#define MODULE_ANALYSIS(NAME, CREATE_PASS)
#define FUNCTION_ANALYSIS(NAME, CREATE_PASS)
#define FUNCTION_ALIAS_ANALYSIS(NAME, CREATE_PASS)
#define LOOP_ANALYSIS(NAME, CREATE_PASS)
#define MACHINE_FUNCTION_ANALYSIS(NAME, CREATE_PASS)

Functions

void llvm::initializeARMExecutionDomainFixPass (PassRegistry &)
LLVM_ABI LLVM_EXTERNAL_VISIBILITY void LLVMInitializeARMTarget ()
static std::unique_ptr< TargetLoweringObjectFilecreateTLOF (const Triple &TT)
static Reloc::Model getEffectiveRelocModel (const Triple &TT, std::optional< Reloc::Model > RM)
 INITIALIZE_PASS_BEGIN (ARMExecutionDomainFix, "arm-execution-domain-fix", "ARM Execution Domain Fix", false, false) INITIALIZE_PASS_END(ARMExecutionDomainFix

Variables

static cl::opt< boolDisableA15SDOptimization ("disable-a15-sd-optimization", cl::Hidden, cl::desc("Inhibit optimization of S->D register accesses on A15"), cl::init(false))
static cl::opt< boolEnableAtomicTidy ("arm-atomic-cfg-tidy", cl::Hidden, cl::desc("Run SimplifyCFG after expanding atomic operations" " to make use of cmpxchg flow-based information"), cl::init(true))
static cl::opt< boolEnableARMLoadStoreOpt ("arm-load-store-opt", cl::Hidden, cl::desc("Enable ARM load/store optimization pass"), cl::init(true))
static cl::opt< cl::boolOrDefaultEnableGlobalMerge ("arm-global-merge", cl::Hidden, cl::desc("Enable the global merge pass"))
arm execution domain fix
arm execution domain ARM Execution Domain Fix
arm execution domain ARM Execution Domain false

Macro Definition Documentation

◆ ADD_CLASS_PASS_TO_PASS_NAME

#define ADD_CLASS_PASS_TO_PASS_NAME ( NAME,
CREATE_PASS )
Value:
PIC->addClassToPassName(decltype(CREATE_PASS)::name(), NAME);
PassInstrumentationCallbacks PIC
static const char * name

◆ ADD_CLASS_PASS_TO_PASS_NAME_WITH_PARAMS

#define ADD_CLASS_PASS_TO_PASS_NAME_WITH_PARAMS ( NAME,
CLASS )
Value:
PIC->addClassToPassName(CLASS, NAME);

◆ ADD_PASS

#define ADD_PASS ( NAME,
CREATE_PASS )
Value:
if (Name == NAME) { \
PM.addPass(CREATE_PASS); \
return true; \
}

◆ ADD_PASS_WITH_PARAMS

#define ADD_PASS_WITH_PARAMS ( NAME,
CREATE_PASS,
PARSER )
Value:
auto Params = PassBuilder::parsePassParameters(PARSER, Name, NAME); \
if (!Params) { \
errs() << NAME ": " << toString(Params.takeError()) << '\n'; \
return false; \
} \
PM.addPass(CREATE_PASS(Params.get())); \
return true; \
}
static bool checkParametrizedPassName(StringRef Name, StringRef PassName)
static auto parsePassParameters(ParametersParseCallableT &&Parser, StringRef Name, StringRef PassName) -> decltype(Parser(StringRef{}))
This performs customized parsing of pass name with parameters.
std::string toString(const APInt &I, unsigned Radix, bool Signed, bool formatAsCLiteral=false, bool UpperCase=true, bool InsertSeparators=false)

◆ FUNCTION_ALIAS_ANALYSIS [1/2]

#define FUNCTION_ALIAS_ANALYSIS ( NAME,
CREATE_PASS )
Value:
ADD_CLASS_PASS_TO_PASS_NAME(NAME, CREATE_PASS)
#define ADD_CLASS_PASS_TO_PASS_NAME(NAME, CREATE_PASS)

◆ FUNCTION_ALIAS_ANALYSIS [2/2]

#define FUNCTION_ALIAS_ANALYSIS ( NAME,
CREATE_PASS )
Value:
if (Name == NAME) { \
AM.registerFunctionAnalysis< \
std::remove_reference_t<decltype(CREATE_PASS)>>(); \
return true; \
}

◆ FUNCTION_ANALYSIS [1/2]

#define FUNCTION_ANALYSIS ( NAME,
CREATE_PASS )
Value:
ADD_CLASS_PASS_TO_PASS_NAME(NAME, CREATE_PASS)

◆ FUNCTION_ANALYSIS [2/2]

#define FUNCTION_ANALYSIS ( NAME,
CREATE_PASS )
Value:
AM.registerPass([&] { return CREATE_PASS; });

◆ FUNCTION_PASS [1/2]

#define FUNCTION_PASS ( NAME,
CREATE_PASS )
Value:
ADD_CLASS_PASS_TO_PASS_NAME(NAME, CREATE_PASS)

◆ FUNCTION_PASS [2/2]

#define FUNCTION_PASS ( NAME,
CREATE_PASS )
Value:
ADD_PASS(NAME, CREATE_PASS)
#define ADD_PASS(NAME, CREATE_PASS)

◆ FUNCTION_PASS_WITH_PARAMS [1/2]

#define FUNCTION_PASS_WITH_PARAMS ( NAME,
CLASS,
CREATE_PASS,
PARSER,
PARAMS )
Value:
#define ADD_CLASS_PASS_TO_PASS_NAME_WITH_PARAMS(NAME, CLASS)

◆ FUNCTION_PASS_WITH_PARAMS [2/2]

#define FUNCTION_PASS_WITH_PARAMS ( NAME,
CLASS,
CREATE_PASS,
PARSER,
PARAMS )
Value:
ADD_PASS_WITH_PARAMS(NAME, CREATE_PASS, PARSER)
#define ADD_PASS_WITH_PARAMS(NAME, CREATE_PASS, PARSER)

◆ GET_PASS_REGISTRY

#define GET_PASS_REGISTRY   "ARMPassRegistry.def"

◆ LOOP_ANALYSIS [1/2]

#define LOOP_ANALYSIS ( NAME,
CREATE_PASS )
Value:
ADD_CLASS_PASS_TO_PASS_NAME(NAME, CREATE_PASS)

◆ LOOP_ANALYSIS [2/2]

#define LOOP_ANALYSIS ( NAME,
CREATE_PASS )
Value:
AM.registerPass([&] { return CREATE_PASS; });

◆ LOOP_PASS [1/2]

#define LOOP_PASS ( NAME,
CREATE_PASS )
Value:
ADD_CLASS_PASS_TO_PASS_NAME(NAME, CREATE_PASS)

◆ LOOP_PASS [2/2]

#define LOOP_PASS ( NAME,
CREATE_PASS )
Value:
ADD_PASS(NAME, CREATE_PASS)

◆ MACHINE_FUNCTION_ANALYSIS [1/2]

#define MACHINE_FUNCTION_ANALYSIS ( NAME,
CREATE_PASS )
Value:
ADD_CLASS_PASS_TO_PASS_NAME(NAME, CREATE_PASS)

◆ MACHINE_FUNCTION_ANALYSIS [2/2]

#define MACHINE_FUNCTION_ANALYSIS ( NAME,
CREATE_PASS )
Value:
AM.registerPass([&] { return CREATE_PASS; });

◆ MACHINE_FUNCTION_PASS [1/2]

#define MACHINE_FUNCTION_PASS ( NAME,
CREATE_PASS )
Value:
ADD_CLASS_PASS_TO_PASS_NAME(NAME, CREATE_PASS)

◆ MACHINE_FUNCTION_PASS [2/2]

#define MACHINE_FUNCTION_PASS ( NAME,
CREATE_PASS )
Value:
ADD_PASS(NAME, CREATE_PASS)

◆ MACHINE_FUNCTION_PASS_WITH_PARAMS [1/2]

#define MACHINE_FUNCTION_PASS_WITH_PARAMS ( NAME,
CLASS,
CREATE_PASS,
PARSER,
PARAMS )

◆ MACHINE_FUNCTION_PASS_WITH_PARAMS [2/2]

#define MACHINE_FUNCTION_PASS_WITH_PARAMS ( NAME,
CLASS,
CREATE_PASS,
PARSER,
PARAMS )
Value:
ADD_PASS_WITH_PARAMS(NAME, CREATE_PASS, PARSER)

◆ MODULE_ANALYSIS [1/2]

#define MODULE_ANALYSIS ( NAME,
CREATE_PASS )
Value:
ADD_CLASS_PASS_TO_PASS_NAME(NAME, CREATE_PASS)

◆ MODULE_ANALYSIS [2/2]

#define MODULE_ANALYSIS ( NAME,
CREATE_PASS )
Value:
AM.registerPass([&] { return CREATE_PASS; });

◆ MODULE_PASS [1/2]

#define MODULE_PASS ( NAME,
CREATE_PASS )
Value:
ADD_CLASS_PASS_TO_PASS_NAME(NAME, CREATE_PASS)

◆ MODULE_PASS [2/2]

#define MODULE_PASS ( NAME,
CREATE_PASS )
Value:
ADD_PASS(NAME, CREATE_PASS)

◆ MODULE_PASS_WITH_PARAMS [1/2]

#define MODULE_PASS_WITH_PARAMS ( NAME,
CLASS,
CREATE_PASS,
PARSER,
PARAMS )

◆ MODULE_PASS_WITH_PARAMS [2/2]

#define MODULE_PASS_WITH_PARAMS ( NAME,
CLASS,
CREATE_PASS,
PARSER,
PARAMS )
Value:
ADD_PASS_WITH_PARAMS(NAME, CREATE_PASS, PARSER)

Function Documentation

◆ createTLOF()

std::unique_ptr< TargetLoweringObjectFile > createTLOF ( const Triple & TT)
static

Definition at line 118 of file ARMTargetMachine.cpp.

◆ getEffectiveRelocModel()

Reloc::Model getEffectiveRelocModel ( const Triple & TT,
std::optional< Reloc::Model > RM )
static

◆ INITIALIZE_PASS_BEGIN()

INITIALIZE_PASS_BEGIN ( ARMExecutionDomainFix ,
"arm-execution-domain-fix" ,
"ARM Execution Domain Fix" ,
false ,
false  )

◆ LLVMInitializeARMTarget()

Variable Documentation

◆ DisableA15SDOptimization

cl::opt< bool > DisableA15SDOptimization("disable-a15-sd-optimization", cl::Hidden, cl::desc("Inhibit optimization of S->D register accesses on A15"), cl::init(false)) ( "disable-a15-sd-optimization" ,
cl::Hidden ,
cl::desc("Inhibit optimization of S->D register accesses on A15") ,
cl::init(false)  )
static

◆ EnableARMLoadStoreOpt

cl::opt< bool > EnableARMLoadStoreOpt("arm-load-store-opt", cl::Hidden, cl::desc("Enable ARM load/store optimization pass"), cl::init(true)) ( "arm-load-store-opt" ,
cl::Hidden ,
cl::desc("Enable ARM load/store optimization pass") ,
cl::init(true)  )
static

◆ EnableAtomicTidy

cl::opt< bool > EnableAtomicTidy("arm-atomic-cfg-tidy", cl::Hidden, cl::desc("Run SimplifyCFG after expanding atomic operations" " to make use of cmpxchg flow-based information"), cl::init(true)) ( "arm-atomic-cfg-tidy" ,
cl::Hidden ,
cl::desc("Run SimplifyCFG after expanding atomic operations" " to make use of cmpxchg flow-based information") ,
cl::init(true)  )
static

◆ EnableGlobalMerge

cl::opt< cl::boolOrDefault > EnableGlobalMerge("arm-global-merge", cl::Hidden, cl::desc("Enable the global merge pass")) ( "arm-global-merge" ,
cl::Hidden ,
cl::desc("Enable the global merge pass")  )
static

◆ false

arm execution domain ARM Execution Domain false

Definition at line 342 of file ARMTargetMachine.cpp.

◆ Fix

arm execution domain ARM Execution Domain Fix

Definition at line 342 of file ARMTargetMachine.cpp.

◆ fix

arm execution domain fix

Definition at line 341 of file ARMTargetMachine.cpp.