LLVM 23.0.0git
SelectionDAGDumper.cpp
Go to the documentation of this file.
1//===- SelectionDAGDumper.cpp - Implement SelectionDAG::dump() ------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This implements the SelectionDAG::dump method and friends.
10//
11//===----------------------------------------------------------------------===//
12
13#include "SDNodeDbgValue.h"
14#include "llvm/ADT/APFloat.h"
15#include "llvm/ADT/APInt.h"
16#include "llvm/ADT/SmallPtrSet.h"
17#include "llvm/ADT/StringExtras.h"
18#include "llvm/CodeGen/ISDOpcodes.h"
19#include "llvm/CodeGen/MachineBasicBlock.h"
20#include "llvm/CodeGen/MachineConstantPool.h"
21#include "llvm/CodeGen/MachineMemOperand.h"
22#include "llvm/CodeGen/SelectionDAG.h"
23#include "llvm/CodeGen/SelectionDAGNodes.h"
24#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
25#include "llvm/CodeGen/TargetInstrInfo.h"
26#include "llvm/CodeGen/TargetLowering.h"
27#include "llvm/CodeGen/TargetRegisterInfo.h"
28#include "llvm/CodeGen/TargetSubtargetInfo.h"
29#include "llvm/CodeGen/ValueTypes.h"
30#include "llvm/CodeGenTypes/MachineValueType.h"
31#include "llvm/Config/llvm-config.h"
32#include "llvm/IR/BasicBlock.h"
33#include "llvm/IR/Constants.h"
34#include "llvm/IR/DebugInfoMetadata.h"
35#include "llvm/IR/DebugLoc.h"
36#include "llvm/IR/Function.h"
37#include "llvm/IR/Intrinsics.h"
38#include "llvm/IR/ModuleSlotTracker.h"
39#include "llvm/IR/Value.h"
40#include "llvm/Support/Casting.h"
41#include "llvm/Support/CommandLine.h"
42#include "llvm/Support/Compiler.h"
43#include "llvm/Support/Debug.h"
44#include "llvm/Support/ErrorHandling.h"
45#include "llvm/Support/Printable.h"
46#include "llvm/Support/raw_ostream.h"
47#include "llvm/Target/TargetMachine.h"
48#include <cstdint>
49#include <iterator>
50
51using namespace llvm;
52
53static cl::opt<bool>
54VerboseDAGDumping("dag-dump-verbose", cl::Hidden,
55 cl::desc("Display more information when dumping selection "
56 "DAG nodes."));
57
58static cl::opt<bool>
59 PrintSDNodeAddrs("print-sdnode-addrs", cl::Hidden,
60 cl::desc("Print addresses of SDNodes when dumping"));
61
62std::string SDNode::getOperationName(const SelectionDAG *G) const {
63 switch (getOpcode()) {
64 default:
65 if (getOpcode() < ISD::BUILTIN_OP_END)
66 return "<<Unknown DAG Node>>";
67 if (isMachineOpcode()) {
68 if (G)
69 if (const TargetInstrInfo *TII = G->getSubtarget().getInstrInfo())
70 if (getMachineOpcode() < TII->getNumOpcodes())
71 return std::string(TII->getName(getMachineOpcode()));
72 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
73 }
74 if (G) {
75 const SelectionDAGTargetInfo &TSI = G->getSelectionDAGInfo();
76 if (const char *Name = TSI.getTargetNodeName(getOpcode()))
77 return Name;
78 const TargetLowering &TLI = G->getTargetLoweringInfo();
79 const char *Name = TLI.getTargetNodeName(getOpcode());
80 if (Name) return Name;
81 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
82 }
83 return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
84
85 // clang-format off
86#ifndef NDEBUG
87 case ISD::DELETED_NODE: return "<<Deleted Node!>>";
88#endif
89 case ISD::PREFETCH: return "Prefetch";
90 case ISD::MEMBARRIER: return "MemBarrier";
91 case ISD::ATOMIC_FENCE: return "AtomicFence";
92 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
93 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS: return "AtomicCmpSwapWithSuccess";
94 case ISD::ATOMIC_SWAP: return "AtomicSwap";
95 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
96 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
97 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
98 case ISD::ATOMIC_LOAD_CLR: return "AtomicLoadClr";
99 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
100 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
101 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
102 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
103 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
104 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
105 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
106 case ISD::ATOMIC_LOAD_FADD: return "AtomicLoadFAdd";
107 case ISD::ATOMIC_LOAD_FSUB: return "AtomicLoadFSub";
108 case ISD::ATOMIC_LOAD_FMIN: return "AtomicLoadFMin";
109 case ISD::ATOMIC_LOAD_FMAX: return "AtomicLoadFMax";
110 case ISD::ATOMIC_LOAD_FMINIMUM: return "AtomicLoadFMinimum";
111 case ISD::ATOMIC_LOAD_FMAXIMUM: return "AtomicLoadFMaximum";
112 case ISD::ATOMIC_LOAD_UINC_WRAP:
113 return "AtomicLoadUIncWrap";
114 case ISD::ATOMIC_LOAD_UDEC_WRAP:
115 return "AtomicLoadUDecWrap";
116 case ISD::ATOMIC_LOAD_USUB_COND:
117 return "AtomicLoadUSubCond";
118 case ISD::ATOMIC_LOAD_USUB_SAT:
119 return "AtomicLoadUSubSat";
120 case ISD::ATOMIC_LOAD: return "AtomicLoad";
121 case ISD::ATOMIC_STORE: return "AtomicStore";
122 case ISD::PCMARKER: return "PCMarker";
123 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
124 case ISD::READSTEADYCOUNTER: return "ReadSteadyCounter";
125 case ISD::SRCVALUE: return "SrcValue";
126 case ISD::MDNODE_SDNODE: return "MDNode";
127 case ISD::EntryToken: return "EntryToken";
128 case ISD::TokenFactor: return "TokenFactor";
129 case ISD::AssertSext: return "AssertSext";
130 case ISD::AssertZext: return "AssertZext";
131 case ISD::AssertNoFPClass: return "AssertNoFPClass";
132 case ISD::AssertAlign: return "AssertAlign";
133
134 case ISD::BasicBlock: return "BasicBlock";
135 case ISD::VALUETYPE: return "ValueType";
136 case ISD::Register: return "Register";
137 case ISD::RegisterMask: return "RegisterMask";
138 case ISD::Constant:
139 if (cast<ConstantSDNode>(this)->isOpaque())
140 return "OpaqueConstant";
141 return "Constant";
142 case ISD::ConstantFP: return "ConstantFP";
143 case ISD::GlobalAddress: return "GlobalAddress";
144 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
145 case ISD::PtrAuthGlobalAddress: return "PtrAuthGlobalAddress";
146 case ISD::FrameIndex: return "FrameIndex";
147 case ISD::JumpTable: return "JumpTable";
148 case ISD::JUMP_TABLE_DEBUG_INFO:
149 return "JUMP_TABLE_DEBUG_INFO";
150 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
151 case ISD::RETURNADDR: return "RETURNADDR";
152 case ISD::ADDROFRETURNADDR: return "ADDROFRETURNADDR";
153 case ISD::FRAMEADDR: return "FRAMEADDR";
154 case ISD::SPONENTRY: return "SPONENTRY";
155 case ISD::STACKADDRESS: return "STACKADDRESS";
156 case ISD::LOCAL_RECOVER: return "LOCAL_RECOVER";
157 case ISD::READ_REGISTER: return "READ_REGISTER";
158 case ISD::WRITE_REGISTER: return "WRITE_REGISTER";
159 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
160 case ISD::EH_DWARF_CFA: return "EH_DWARF_CFA";
161 case ISD::EH_RETURN: return "EH_RETURN";
162 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
163 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
164 case ISD::EH_SJLJ_SETUP_DISPATCH: return "EH_SJLJ_SETUP_DISPATCH";
165 case ISD::ConstantPool: return "ConstantPool";
166 case ISD::TargetIndex: return "TargetIndex";
167 case ISD::ExternalSymbol: return "ExternalSymbol";
168 case ISD::BlockAddress: return "BlockAddress";
169 case ISD::INTRINSIC_WO_CHAIN:
170 case ISD::INTRINSIC_VOID:
171 case ISD::INTRINSIC_W_CHAIN: {
172 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
173 unsigned IID = getOperand(OpNo)->getAsZExtVal();
174 if (IID < Intrinsic::num_intrinsics)
175 return Intrinsic::getBaseName((Intrinsic::ID)IID).str();
176 if (!G)
177 return "Unknown intrinsic";
178 llvm_unreachable("Invalid intrinsic ID");
179 }
180
181 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
182 case ISD::TargetConstant:
183 if (cast<ConstantSDNode>(this)->isOpaque())
184 return "OpaqueTargetConstant";
185 return "TargetConstant";
186
187 case ISD::TargetConstantFP: return "TargetConstantFP";
188 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
189 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
190 case ISD::TargetFrameIndex: return "TargetFrameIndex";
191 case ISD::TargetJumpTable: return "TargetJumpTable";
192 case ISD::TargetConstantPool: return "TargetConstantPool";
193 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
194 case ISD::MCSymbol: return "MCSymbol";
195 case ISD::TargetBlockAddress: return "TargetBlockAddress";
196
197 case ISD::CopyToReg: return "CopyToReg";
198 case ISD::CopyFromReg: return "CopyFromReg";
199 case ISD::UNDEF: return "undef";
200 case ISD::POISON: return "poison";
201 case ISD::VSCALE: return "vscale";
202 case ISD::MERGE_VALUES: return "merge_values";
203 case ISD::INLINEASM: return "inlineasm";
204 case ISD::INLINEASM_BR: return "inlineasm_br";
205 case ISD::EH_LABEL: return "eh_label";
206 case ISD::ANNOTATION_LABEL: return "annotation_label";
207 case ISD::HANDLENODE: return "handlenode";
208
209 // Unary operators
210 case ISD::FABS: return "fabs";
211 case ISD::FMINNUM: return "fminnum";
212 case ISD::STRICT_FMINNUM: return "strict_fminnum";
213 case ISD::FMAXNUM: return "fmaxnum";
214 case ISD::STRICT_FMAXNUM: return "strict_fmaxnum";
215 case ISD::FMINNUM_IEEE: return "fminnum_ieee";
216 case ISD::FMAXNUM_IEEE: return "fmaxnum_ieee";
217 case ISD::FMINIMUM: return "fminimum";
218 case ISD::STRICT_FMINIMUM: return "strict_fminimum";
219 case ISD::FMAXIMUM: return "fmaximum";
220 case ISD::STRICT_FMAXIMUM: return "strict_fmaximum";
221 case ISD::FMINIMUMNUM: return "fminimumnum";
222 case ISD::FMAXIMUMNUM: return "fmaximumnum";
223 case ISD::FNEG: return "fneg";
224 case ISD::FSQRT: return "fsqrt";
225 case ISD::STRICT_FSQRT: return "strict_fsqrt";
226 case ISD::FCBRT: return "fcbrt";
227 case ISD::FSIN: return "fsin";
228 case ISD::STRICT_FSIN: return "strict_fsin";
229 case ISD::FCOS: return "fcos";
230 case ISD::STRICT_FCOS: return "strict_fcos";
231 case ISD::FSINCOS: return "fsincos";
232 case ISD::FSINCOSPI: return "fsincospi";
233 case ISD::FMODF: return "fmodf";
234 case ISD::FTAN: return "ftan";
235 case ISD::STRICT_FTAN: return "strict_ftan";
236 case ISD::FASIN: return "fasin";
237 case ISD::STRICT_FASIN: return "strict_fasin";
238 case ISD::FACOS: return "facos";
239 case ISD::STRICT_FACOS: return "strict_facos";
240 case ISD::FATAN: return "fatan";
241 case ISD::STRICT_FATAN: return "strict_fatan";
242 case ISD::FATAN2: return "fatan2";
243 case ISD::STRICT_FATAN2: return "strict_fatan2";
244 case ISD::FSINH: return "fsinh";
245 case ISD::STRICT_FSINH: return "strict_fsinh";
246 case ISD::FCOSH: return "fcosh";
247 case ISD::STRICT_FCOSH: return "strict_fcosh";
248 case ISD::FTANH: return "ftanh";
249 case ISD::STRICT_FTANH: return "strict_ftanh";
250 case ISD::FTRUNC: return "ftrunc";
251 case ISD::STRICT_FTRUNC: return "strict_ftrunc";
252 case ISD::FFLOOR: return "ffloor";
253 case ISD::STRICT_FFLOOR: return "strict_ffloor";
254 case ISD::FCEIL: return "fceil";
255 case ISD::STRICT_FCEIL: return "strict_fceil";
256 case ISD::FRINT: return "frint";
257 case ISD::STRICT_FRINT: return "strict_frint";
258 case ISD::FNEARBYINT: return "fnearbyint";
259 case ISD::STRICT_FNEARBYINT: return "strict_fnearbyint";
260 case ISD::FROUND: return "fround";
261 case ISD::STRICT_FROUND: return "strict_fround";
262 case ISD::FROUNDEVEN: return "froundeven";
263 case ISD::STRICT_FROUNDEVEN: return "strict_froundeven";
264 case ISD::FEXP: return "fexp";
265 case ISD::STRICT_FEXP: return "strict_fexp";
266 case ISD::FEXP2: return "fexp2";
267 case ISD::STRICT_FEXP2: return "strict_fexp2";
268 case ISD::FEXP10: return "fexp10";
269 case ISD::FLOG: return "flog";
270 case ISD::STRICT_FLOG: return "strict_flog";
271 case ISD::FLOG2: return "flog2";
272 case ISD::STRICT_FLOG2: return "strict_flog2";
273 case ISD::FLOG10: return "flog10";
274 case ISD::STRICT_FLOG10: return "strict_flog10";
275
276 // Binary operators
277 case ISD::ADD: return "add";
278 case ISD::PTRADD: return "ptradd";
279 case ISD::SUB: return "sub";
280 case ISD::MUL: return "mul";
281 case ISD::MULHU: return "mulhu";
282 case ISD::MULHS: return "mulhs";
283 case ISD::AVGFLOORU: return "avgflooru";
284 case ISD::AVGFLOORS: return "avgfloors";
285 case ISD::AVGCEILU: return "avgceilu";
286 case ISD::AVGCEILS: return "avgceils";
287 case ISD::ABDS: return "abds";
288 case ISD::ABDU: return "abdu";
289 case ISD::SDIV: return "sdiv";
290 case ISD::UDIV: return "udiv";
291 case ISD::SREM: return "srem";
292 case ISD::UREM: return "urem";
293 case ISD::SMUL_LOHI: return "smul_lohi";
294 case ISD::UMUL_LOHI: return "umul_lohi";
295 case ISD::SDIVREM: return "sdivrem";
296 case ISD::UDIVREM: return "udivrem";
297 case ISD::AND: return "and";
298 case ISD::OR: return "or";
299 case ISD::XOR: return "xor";
300 case ISD::SHL: return "shl";
301 case ISD::SRA: return "sra";
302 case ISD::SRL: return "srl";
303 case ISD::ROTL: return "rotl";
304 case ISD::ROTR: return "rotr";
305 case ISD::FSHL: return "fshl";
306 case ISD::FSHR: return "fshr";
307 case ISD::CLMUL: return "clmul";
308 case ISD::CLMULR: return "clmulr";
309 case ISD::CLMULH: return "clmulh";
310 case ISD::FADD: return "fadd";
311 case ISD::STRICT_FADD: return "strict_fadd";
312 case ISD::FSUB: return "fsub";
313 case ISD::STRICT_FSUB: return "strict_fsub";
314 case ISD::FMUL: return "fmul";
315 case ISD::STRICT_FMUL: return "strict_fmul";
316 case ISD::FDIV: return "fdiv";
317 case ISD::STRICT_FDIV: return "strict_fdiv";
318 case ISD::FMA: return "fma";
319 case ISD::STRICT_FMA: return "strict_fma";
320 case ISD::FMAD: return "fmad";
321 case ISD::FMULADD: return "fmuladd";
322 case ISD::FREM: return "frem";
323 case ISD::STRICT_FREM: return "strict_frem";
324 case ISD::FCOPYSIGN: return "fcopysign";
325 case ISD::FGETSIGN: return "fgetsign";
326 case ISD::FCANONICALIZE: return "fcanonicalize";
327 case ISD::IS_FPCLASS: return "is_fpclass";
328 case ISD::FPOW: return "fpow";
329 case ISD::STRICT_FPOW: return "strict_fpow";
330 case ISD::SMIN: return "smin";
331 case ISD::SMAX: return "smax";
332 case ISD::UMIN: return "umin";
333 case ISD::UMAX: return "umax";
334 case ISD::SCMP: return "scmp";
335 case ISD::UCMP: return "ucmp";
336
337 case ISD::FLDEXP: return "fldexp";
338 case ISD::STRICT_FLDEXP: return "strict_fldexp";
339 case ISD::FFREXP: return "ffrexp";
340 case ISD::FPOWI: return "fpowi";
341 case ISD::STRICT_FPOWI: return "strict_fpowi";
342 case ISD::SETCC: return "setcc";
343 case ISD::SETCCCARRY: return "setcccarry";
344 case ISD::STRICT_FSETCC: return "strict_fsetcc";
345 case ISD::STRICT_FSETCCS: return "strict_fsetccs";
346 case ISD::FPTRUNC_ROUND: return "fptrunc_round";
347 case ISD::SELECT: return "select";
348 case ISD::VSELECT: return "vselect";
349 case ISD::SELECT_CC: return "select_cc";
350 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
351 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
352 case ISD::CONCAT_VECTORS: return "concat_vectors";
353 case ISD::INSERT_SUBVECTOR: return "insert_subvector";
354 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
355 case ISD::VECTOR_DEINTERLEAVE: return "vector_deinterleave";
356 case ISD::VECTOR_INTERLEAVE: return "vector_interleave";
357 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
358 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
359 case ISD::VECTOR_SPLICE_LEFT: return "vector_splice_left";
360 case ISD::VECTOR_SPLICE_RIGHT: return "vector_splice_right";
361 case ISD::SPLAT_VECTOR: return "splat_vector";
362 case ISD::SPLAT_VECTOR_PARTS: return "splat_vector_parts";
363 case ISD::VECTOR_REVERSE: return "vector_reverse";
364 case ISD::STEP_VECTOR: return "step_vector";
365 case ISD::CARRY_FALSE: return "carry_false";
366 case ISD::ADDC: return "addc";
367 case ISD::ADDE: return "adde";
368 case ISD::UADDO_CARRY: return "uaddo_carry";
369 case ISD::SADDO_CARRY: return "saddo_carry";
370 case ISD::SADDO: return "saddo";
371 case ISD::UADDO: return "uaddo";
372 case ISD::SSUBO: return "ssubo";
373 case ISD::USUBO: return "usubo";
374 case ISD::SMULO: return "smulo";
375 case ISD::UMULO: return "umulo";
376 case ISD::SUBC: return "subc";
377 case ISD::SUBE: return "sube";
378 case ISD::USUBO_CARRY: return "usubo_carry";
379 case ISD::SSUBO_CARRY: return "ssubo_carry";
380 case ISD::SHL_PARTS: return "shl_parts";
381 case ISD::SRA_PARTS: return "sra_parts";
382 case ISD::SRL_PARTS: return "srl_parts";
383
384 case ISD::SADDSAT: return "saddsat";
385 case ISD::UADDSAT: return "uaddsat";
386 case ISD::SSUBSAT: return "ssubsat";
387 case ISD::USUBSAT: return "usubsat";
388 case ISD::SSHLSAT: return "sshlsat";
389 case ISD::USHLSAT: return "ushlsat";
390
391 case ISD::SMULFIX: return "smulfix";
392 case ISD::SMULFIXSAT: return "smulfixsat";
393 case ISD::UMULFIX: return "umulfix";
394 case ISD::UMULFIXSAT: return "umulfixsat";
395
396 case ISD::SDIVFIX: return "sdivfix";
397 case ISD::SDIVFIXSAT: return "sdivfixsat";
398 case ISD::UDIVFIX: return "udivfix";
399 case ISD::UDIVFIXSAT: return "udivfixsat";
400
401 // Conversion operators.
402 case ISD::SIGN_EXTEND: return "sign_extend";
403 case ISD::ZERO_EXTEND: return "zero_extend";
404 case ISD::ANY_EXTEND: return "any_extend";
405 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
406 case ISD::ANY_EXTEND_VECTOR_INREG: return "any_extend_vector_inreg";
407 case ISD::SIGN_EXTEND_VECTOR_INREG: return "sign_extend_vector_inreg";
408 case ISD::ZERO_EXTEND_VECTOR_INREG: return "zero_extend_vector_inreg";
409 case ISD::TRUNCATE: return "truncate";
410 case ISD::TRUNCATE_SSAT_S: return "truncate_ssat_s";
411 case ISD::TRUNCATE_SSAT_U: return "truncate_ssat_u";
412 case ISD::TRUNCATE_USAT_U: return "truncate_usat_u";
413 case ISD::FP_ROUND: return "fp_round";
414 case ISD::STRICT_FP_ROUND: return "strict_fp_round";
415 case ISD::FP_EXTEND: return "fp_extend";
416 case ISD::STRICT_FP_EXTEND: return "strict_fp_extend";
417
418 case ISD::SINT_TO_FP: return "sint_to_fp";
419 case ISD::STRICT_SINT_TO_FP: return "strict_sint_to_fp";
420 case ISD::UINT_TO_FP: return "uint_to_fp";
421 case ISD::STRICT_UINT_TO_FP: return "strict_uint_to_fp";
422 case ISD::FP_TO_SINT: return "fp_to_sint";
423 case ISD::STRICT_FP_TO_SINT: return "strict_fp_to_sint";
424 case ISD::FP_TO_UINT: return "fp_to_uint";
425 case ISD::STRICT_FP_TO_UINT: return "strict_fp_to_uint";
426 case ISD::FP_TO_SINT_SAT: return "fp_to_sint_sat";
427 case ISD::FP_TO_UINT_SAT: return "fp_to_uint_sat";
428 case ISD::BITCAST: return "bitcast";
429 case ISD::ADDRSPACECAST: return "addrspacecast";
430 case ISD::FP16_TO_FP: return "fp16_to_fp";
431 case ISD::STRICT_FP16_TO_FP: return "strict_fp16_to_fp";
432 case ISD::FP_TO_FP16: return "fp_to_fp16";
433 case ISD::STRICT_FP_TO_FP16: return "strict_fp_to_fp16";
434 case ISD::BF16_TO_FP: return "bf16_to_fp";
435 case ISD::STRICT_BF16_TO_FP: return "strict_bf16_to_fp";
436 case ISD::FP_TO_BF16: return "fp_to_bf16";
437 case ISD::STRICT_FP_TO_BF16: return "strict_fp_to_bf16";
438 case ISD::CONVERT_FROM_ARBITRARY_FP: return "convert_from_arbitrary_fp";
439 case ISD::LROUND: return "lround";
440 case ISD::STRICT_LROUND: return "strict_lround";
441 case ISD::LLROUND: return "llround";
442 case ISD::STRICT_LLROUND: return "strict_llround";
443 case ISD::LRINT: return "lrint";
444 case ISD::STRICT_LRINT: return "strict_lrint";
445 case ISD::LLRINT: return "llrint";
446 case ISD::STRICT_LLRINT: return "strict_llrint";
447
448 // Control flow instructions
449 case ISD::BR: return "br";
450 case ISD::BRIND: return "brind";
451 case ISD::BR_JT: return "br_jt";
452 case ISD::BRCOND: return "brcond";
453 case ISD::BR_CC: return "br_cc";
454 case ISD::CALLSEQ_START: return "callseq_start";
455 case ISD::CALLSEQ_END: return "callseq_end";
456
457 // EH instructions
458 case ISD::CATCHRET: return "catchret";
459 case ISD::CLEANUPRET: return "cleanupret";
460
461 // Other operators
462 case ISD::LOAD: return "load";
463 case ISD::STORE: return "store";
464 case ISD::MLOAD: return "masked_load";
465 case ISD::MSTORE: return "masked_store";
466 case ISD::MGATHER: return "masked_gather";
467 case ISD::MSCATTER: return "masked_scatter";
468 case ISD::VECTOR_COMPRESS: return "vector_compress";
469 case ISD::VAARG: return "vaarg";
470 case ISD::VACOPY: return "vacopy";
471 case ISD::VAEND: return "vaend";
472 case ISD::VASTART: return "vastart";
473 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
474 case ISD::EXTRACT_ELEMENT: return "extract_element";
475 case ISD::BUILD_PAIR: return "build_pair";
476 case ISD::STACKSAVE: return "stacksave";
477 case ISD::STACKRESTORE: return "stackrestore";
478 case ISD::TRAP: return "trap";
479 case ISD::DEBUGTRAP: return "debugtrap";
480 case ISD::UBSANTRAP: return "ubsantrap";
481 case ISD::LIFETIME_START: return "lifetime.start";
482 case ISD::LIFETIME_END: return "lifetime.end";
483 case ISD::FAKE_USE:
484 return "fake_use";
485 case ISD::RELOC_NONE:
486 return "reloc_none";
487 case ISD::COND_LOOP:
488 return "cond_loop";
489 case ISD::PSEUDO_PROBE:
490 return "pseudoprobe";
491 case ISD::GC_TRANSITION_START: return "gc_transition.start";
492 case ISD::GC_TRANSITION_END: return "gc_transition.end";
493 case ISD::GET_DYNAMIC_AREA_OFFSET: return "get.dynamic.area.offset";
494 case ISD::FREEZE: return "freeze";
495 case ISD::PREALLOCATED_SETUP:
496 return "call_setup";
497 case ISD::PREALLOCATED_ARG:
498 return "call_alloc";
499
500 // Floating point environment manipulation
501 case ISD::GET_ROUNDING: return "get_rounding";
502 case ISD::SET_ROUNDING: return "set_rounding";
503 case ISD::GET_FPENV: return "get_fpenv";
504 case ISD::SET_FPENV: return "set_fpenv";
505 case ISD::RESET_FPENV: return "reset_fpenv";
506 case ISD::GET_FPENV_MEM: return "get_fpenv_mem";
507 case ISD::SET_FPENV_MEM: return "set_fpenv_mem";
508 case ISD::GET_FPMODE: return "get_fpmode";
509 case ISD::SET_FPMODE: return "set_fpmode";
510 case ISD::RESET_FPMODE: return "reset_fpmode";
511
512 // Convergence control instructions
513 case ISD::CONVERGENCECTRL_ANCHOR: return "convergencectrl_anchor";
514 case ISD::CONVERGENCECTRL_ENTRY: return "convergencectrl_entry";
515 case ISD::CONVERGENCECTRL_LOOP: return "convergencectrl_loop";
516 case ISD::CONVERGENCECTRL_GLUE: return "convergencectrl_glue";
517
518 // Bit manipulation
519 case ISD::ABS: return "abs";
520 case ISD::BITREVERSE: return "bitreverse";
521 case ISD::BSWAP: return "bswap";
522 case ISD::CTPOP: return "ctpop";
523 case ISD::CTTZ: return "cttz";
524 case ISD::CTTZ_ZERO_UNDEF: return "cttz_zero_undef";
525 case ISD::CTLZ: return "ctlz";
526 case ISD::CTLZ_ZERO_UNDEF: return "ctlz_zero_undef";
527 case ISD::CTLS: return "ctls";
528 case ISD::PARITY: return "parity";
529
530 // Trampolines
531 case ISD::INIT_TRAMPOLINE: return "init_trampoline";
532 case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline";
533
534 // clang-format on
535
536 case ISD::CONDCODE:
537 switch (cast<CondCodeSDNode>(this)->get()) {
538 default: llvm_unreachable("Unknown setcc condition!");
539 case ISD::SETOEQ: return "setoeq";
540 case ISD::SETOGT: return "setogt";
541 case ISD::SETOGE: return "setoge";
542 case ISD::SETOLT: return "setolt";
543 case ISD::SETOLE: return "setole";
544 case ISD::SETONE: return "setone";
545
546 case ISD::SETO: return "seto";
547 case ISD::SETUO: return "setuo";
548 case ISD::SETUEQ: return "setueq";
549 case ISD::SETUGT: return "setugt";
550 case ISD::SETUGE: return "setuge";
551 case ISD::SETULT: return "setult";
552 case ISD::SETULE: return "setule";
553 case ISD::SETUNE: return "setune";
554
555 case ISD::SETEQ: return "seteq";
556 case ISD::SETGT: return "setgt";
557 case ISD::SETGE: return "setge";
558 case ISD::SETLT: return "setlt";
559 case ISD::SETLE: return "setle";
560 case ISD::SETNE: return "setne";
561
562 case ISD::SETTRUE: return "settrue";
563 case ISD::SETTRUE2: return "settrue2";
564 case ISD::SETFALSE: return "setfalse";
565 case ISD::SETFALSE2: return "setfalse2";
566 }
567 case ISD::VECREDUCE_FADD: return "vecreduce_fadd";
568 case ISD::VECREDUCE_SEQ_FADD: return "vecreduce_seq_fadd";
569 case ISD::VECREDUCE_FMUL: return "vecreduce_fmul";
570 case ISD::VECREDUCE_SEQ_FMUL: return "vecreduce_seq_fmul";
571 case ISD::VECREDUCE_ADD: return "vecreduce_add";
572 case ISD::VECREDUCE_MUL: return "vecreduce_mul";
573 case ISD::VECREDUCE_AND: return "vecreduce_and";
574 case ISD::VECREDUCE_OR: return "vecreduce_or";
575 case ISD::VECREDUCE_XOR: return "vecreduce_xor";
576 case ISD::VECREDUCE_SMAX: return "vecreduce_smax";
577 case ISD::VECREDUCE_SMIN: return "vecreduce_smin";
578 case ISD::VECREDUCE_UMAX: return "vecreduce_umax";
579 case ISD::VECREDUCE_UMIN: return "vecreduce_umin";
580 case ISD::VECREDUCE_FMAX: return "vecreduce_fmax";
581 case ISD::VECREDUCE_FMIN: return "vecreduce_fmin";
582 case ISD::VECREDUCE_FMAXIMUM: return "vecreduce_fmaximum";
583 case ISD::VECREDUCE_FMINIMUM: return "vecreduce_fminimum";
584 case ISD::STACKMAP:
585 return "stackmap";
586 case ISD::PATCHPOINT:
587 return "patchpoint";
588 case ISD::CLEAR_CACHE:
589 return "clear_cache";
590
591 case ISD::EXPERIMENTAL_VECTOR_HISTOGRAM:
592 return "histogram";
593
594 case ISD::VECTOR_FIND_LAST_ACTIVE:
595 return "find_last_active";
596
597 case ISD::GET_ACTIVE_LANE_MASK:
598 return "get_active_lane_mask";
599
600 case ISD::PARTIAL_REDUCE_UMLA:
601 return "partial_reduce_umla";
602 case ISD::PARTIAL_REDUCE_SMLA:
603 return "partial_reduce_smla";
604 case ISD::PARTIAL_REDUCE_SUMLA:
605 return "partial_reduce_sumla";
606 case ISD::PARTIAL_REDUCE_FMLA:
607 return "partial_reduce_fmla";
608 case ISD::LOOP_DEPENDENCE_WAR_MASK:
609 return "loop_dep_war";
610 case ISD::LOOP_DEPENDENCE_RAW_MASK:
611 return "loop_dep_raw";
612
613 // Vector Predication
614#define BEGIN_REGISTER_VP_SDNODE(SDID, LEGALARG, NAME, ...) \
615 case ISD::SDID: \
616 return #NAME;
617#include "llvm/IR/VPIntrinsics.def"
618 }
619}
620
621const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
622 switch (AM) {
623 default: return "";
624 case ISD::PRE_INC: return "<pre-inc>";
625 case ISD::PRE_DEC: return "<pre-dec>";
626 case ISD::POST_INC: return "<post-inc>";
627 case ISD::POST_DEC: return "<post-dec>";
628 }
629}
630
631static Printable PrintNodeId(const SDNode &Node) {
632 return Printable([&Node](raw_ostream &OS) {
633#ifndef NDEBUG
634 static const raw_ostream::Colors Color[] = {
635 raw_ostream::BLACK, raw_ostream::RED, raw_ostream::GREEN,
636 raw_ostream::YELLOW, raw_ostream::BLUE, raw_ostream::MAGENTA,
637 raw_ostream::CYAN,
638 };
639 OS.changeColor(Color[Node.PersistentId % std::size(Color)]);
640 OS << 't' << Node.PersistentId;
641 OS.resetColor();
642#else
643 OS << (const void*)&Node;
644#endif
645 });
646}
647
648// Print the MMO with more information from the SelectionDAG.
649static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
650 const MachineFunction *MF, const Module *M,
651 const MachineFrameInfo *MFI,
652 const TargetInstrInfo *TII, LLVMContext &Ctx) {
653 ModuleSlotTracker MST(M);
654 if (MF)
655 MST.incorporateFunction(MF->getFunction());
656 SmallVector<StringRef, 0> SSNs;
657 MMO.print(OS, MST, SSNs, Ctx, MFI, TII);
658}
659
660static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
661 const SelectionDAG *G) {
662 if (G) {
663 const MachineFunction *MF = &G->getMachineFunction();
664 return printMemOperand(OS, MMO, MF, MF->getFunction().getParent(),
665 &MF->getFrameInfo(),
666 G->getSubtarget().getInstrInfo(), *G->getContext());
667 }
668
669 LLVMContext Ctx;
670 return printMemOperand(OS, MMO, /*MF=*/nullptr, /*M=*/nullptr,
671 /*MFI=*/nullptr, /*TII=*/nullptr, Ctx);
672}
673
674#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
675LLVM_DUMP_METHOD void SDNode::dump() const { dump(nullptr); }
676
677LLVM_DUMP_METHOD void SDNode::dump(const SelectionDAG *G) const {
678 print(dbgs(), G);
679 dbgs() << '\n';
680}
681#endif
682
683void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
684 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
685 if (i) OS << ",";
686 if (getValueType(i) == MVT::Other)
687 OS << "ch";
688 else
689 OS << getValueType(i).getEVTString();
690 }
691}
692
693void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
694 if (getFlags().hasNoUnsignedWrap())
695 OS << " nuw";
696
697 if (getFlags().hasNoSignedWrap())
698 OS << " nsw";
699
700 if (getFlags().hasExact())
701 OS << " exact";
702
703 if (getFlags().hasDisjoint())
704 OS << " disjoint";
705
706 if (getFlags().hasSameSign())
707 OS << " samesign";
708
709 if (getFlags().hasInBounds())
710 OS << " inbounds";
711
712 if (getFlags().hasNonNeg())
713 OS << " nneg";
714
715 if (getFlags().hasNoNaNs())
716 OS << " nnan";
717
718 if (getFlags().hasNoInfs())
719 OS << " ninf";
720
721 if (getFlags().hasNoSignedZeros())
722 OS << " nsz";
723
724 if (getFlags().hasAllowReciprocal())
725 OS << " arcp";
726
727 if (getFlags().hasAllowContract())
728 OS << " contract";
729
730 if (getFlags().hasApproximateFuncs())
731 OS << " afn";
732
733 if (getFlags().hasAllowReassociation())
734 OS << " reassoc";
735
736 if (getFlags().hasNoFPExcept())
737 OS << " nofpexcept";
738
739 if (getFlags().hasNoConvergent())
740 OS << " noconvergent";
741
742 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
743 if (!MN->memoperands_empty()) {
744 OS << "<";
745 OS << "Mem:";
746 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
747 e = MN->memoperands_end(); i != e; ++i) {
748 printMemOperand(OS, **i, G);
749 if (std::next(i) != e)
750 OS << " ";
751 }
752 OS << ">";
753 }
754 } else if (const ShuffleVectorSDNode *SVN =
755 dyn_cast<ShuffleVectorSDNode>(this)) {
756 OS << "<";
757 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
758 int Idx = SVN->getMaskElt(i);
759 if (i) OS << ",";
760 if (Idx < 0)
761 OS << "u";
762 else
763 OS << Idx;
764 }
765 OS << ">";
766 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
767 OS << '<' << CSDN->getAPIntValue() << '>';
768 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
769 if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEsingle())
770 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
771 else if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEdouble())
772 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
773 else {
774 OS << "<APFloat(";
775 CSDN->getValueAPF().bitcastToAPInt().print(OS, false);
776 OS << ")>";
777 }
778 } else if (const GlobalAddressSDNode *GADN =
779 dyn_cast<GlobalAddressSDNode>(this)) {
780 int64_t offset = GADN->getOffset();
781 OS << '<';
782 GADN->getGlobal()->printAsOperand(OS);
783 OS << '>';
784 if (offset > 0)
785 OS << " + " << offset;
786 else
787 OS << " " << offset;
788 if (unsigned int TF = GADN->getTargetFlags())
789 OS << " [TF=" << TF << ']';
790 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
791 OS << "<" << FIDN->getIndex() << ">";
792 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
793 OS << "<" << JTDN->getIndex() << ">";
794 if (unsigned int TF = JTDN->getTargetFlags())
795 OS << " [TF=" << TF << ']';
796 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
797 int offset = CP->getOffset();
798 if (CP->isMachineConstantPoolEntry())
799 OS << "<" << *CP->getMachineCPVal() << ">";
800 else
801 OS << "<" << *CP->getConstVal() << ">";
802 if (offset > 0)
803 OS << " + " << offset;
804 else
805 OS << " " << offset;
806 if (unsigned int TF = CP->getTargetFlags())
807 OS << " [TF=" << TF << ']';
808 } else if (const TargetIndexSDNode *TI = dyn_cast<TargetIndexSDNode>(this)) {
809 OS << "<" << TI->getIndex() << '+' << TI->getOffset() << ">";
810 if (unsigned TF = TI->getTargetFlags())
811 OS << " [TF=" << TF << ']';
812 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
813 OS << "<";
814 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
815 if (LBB)
816 OS << LBB->getName() << " ";
817 OS << (const void*)BBDN->getBasicBlock() << ">";
818 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
819 OS << ' ' << printReg(R->getReg(),
820 G ? G->getSubtarget().getRegisterInfo() : nullptr);
821 } else if (const ExternalSymbolSDNode *ES =
822 dyn_cast<ExternalSymbolSDNode>(this)) {
823 OS << "'" << ES->getSymbol() << "'";
824 if (unsigned int TF = ES->getTargetFlags())
825 OS << " [TF=" << TF << ']';
826 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
827 if (M->getValue())
828 OS << "<" << M->getValue() << ">";
829 else
830 OS << "<null>";
831 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) {
832 if (MD->getMD())
833 OS << "<" << MD->getMD() << ">";
834 else
835 OS << "<null>";
836 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
837 OS << ":" << N->getVT();
838 }
839 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
840 OS << "<";
841
842 printMemOperand(OS, *LD->getMemOperand(), G);
843
844 bool doExt = true;
845 switch (LD->getExtensionType()) {
846 default: doExt = false; break;
847 case ISD::EXTLOAD: OS << ", anyext"; break;
848 case ISD::SEXTLOAD: OS << ", sext"; break;
849 case ISD::ZEXTLOAD: OS << ", zext"; break;
850 }
851 if (doExt)
852 OS << " from " << LD->getMemoryVT();
853
854 const char *AM = getIndexedModeName(LD->getAddressingMode());
855 if (*AM)
856 OS << ", " << AM;
857
858 OS << ">";
859 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
860 OS << "<";
861 printMemOperand(OS, *ST->getMemOperand(), G);
862
863 if (ST->isTruncatingStore())
864 OS << ", trunc to " << ST->getMemoryVT();
865
866 const char *AM = getIndexedModeName(ST->getAddressingMode());
867 if (*AM)
868 OS << ", " << AM;
869
870 OS << ">";
871 } else if (const MaskedLoadSDNode *MLd = dyn_cast<MaskedLoadSDNode>(this)) {
872 OS << "<";
873
874 printMemOperand(OS, *MLd->getMemOperand(), G);
875
876 bool doExt = true;
877 switch (MLd->getExtensionType()) {
878 default: doExt = false; break;
879 case ISD::EXTLOAD: OS << ", anyext"; break;
880 case ISD::SEXTLOAD: OS << ", sext"; break;
881 case ISD::ZEXTLOAD: OS << ", zext"; break;
882 }
883 if (doExt)
884 OS << " from " << MLd->getMemoryVT();
885
886 const char *AM = getIndexedModeName(MLd->getAddressingMode());
887 if (*AM)
888 OS << ", " << AM;
889
890 if (MLd->isExpandingLoad())
891 OS << ", expanding";
892
893 OS << ">";
894 } else if (const MaskedStoreSDNode *MSt = dyn_cast<MaskedStoreSDNode>(this)) {
895 OS << "<";
896 printMemOperand(OS, *MSt->getMemOperand(), G);
897
898 if (MSt->isTruncatingStore())
899 OS << ", trunc to " << MSt->getMemoryVT();
900
901 const char *AM = getIndexedModeName(MSt->getAddressingMode());
902 if (*AM)
903 OS << ", " << AM;
904
905 if (MSt->isCompressingStore())
906 OS << ", compressing";
907
908 OS << ">";
909 } else if (const auto *MGather = dyn_cast<MaskedGatherSDNode>(this)) {
910 OS << "<";
911 printMemOperand(OS, *MGather->getMemOperand(), G);
912
913 bool doExt = true;
914 switch (MGather->getExtensionType()) {
915 default: doExt = false; break;
916 case ISD::EXTLOAD: OS << ", anyext"; break;
917 case ISD::SEXTLOAD: OS << ", sext"; break;
918 case ISD::ZEXTLOAD: OS << ", zext"; break;
919 }
920 if (doExt)
921 OS << " from " << MGather->getMemoryVT();
922
923 auto Signed = MGather->isIndexSigned() ? "signed" : "unsigned";
924 auto Scaled = MGather->isIndexScaled() ? "scaled" : "unscaled";
925 OS << ", " << Signed << " " << Scaled << " offset";
926
927 OS << ">";
928 } else if (const auto *MScatter = dyn_cast<MaskedScatterSDNode>(this)) {
929 OS << "<";
930 printMemOperand(OS, *MScatter->getMemOperand(), G);
931
932 if (MScatter->isTruncatingStore())
933 OS << ", trunc to " << MScatter->getMemoryVT();
934
935 auto Signed = MScatter->isIndexSigned() ? "signed" : "unsigned";
936 auto Scaled = MScatter->isIndexScaled() ? "scaled" : "unscaled";
937 OS << ", " << Signed << " " << Scaled << " offset";
938
939 OS << ">";
940 } else if (const MemSDNode *M = dyn_cast<MemSDNode>(this)) {
941 OS << "<";
942 interleaveComma(M->memoperands(), OS, [&](const MachineMemOperand *MMO) {
943 printMemOperand(OS, *MMO, G);
944 });
945 if (auto *A = dyn_cast<AtomicSDNode>(M))
946 if (A->getOpcode() == ISD::ATOMIC_LOAD) {
947 bool doExt = true;
948 switch (A->getExtensionType()) {
949 default: doExt = false; break;
950 case ISD::EXTLOAD: OS << ", anyext"; break;
951 case ISD::SEXTLOAD: OS << ", sext"; break;
952 case ISD::ZEXTLOAD: OS << ", zext"; break;
953 }
954 if (doExt)
955 OS << " from " << A->getMemoryVT();
956 }
957 OS << ">";
958 } else if (const BlockAddressSDNode *BA =
959 dyn_cast<BlockAddressSDNode>(this)) {
960 int64_t offset = BA->getOffset();
961 OS << "<";
962 BA->getBlockAddress()->getFunction()->printAsOperand(OS, false);
963 OS << ", ";
964 BA->getBlockAddress()->getBasicBlock()->printAsOperand(OS, false);
965 OS << ">";
966 if (offset > 0)
967 OS << " + " << offset;
968 else
969 OS << " " << offset;
970 if (unsigned int TF = BA->getTargetFlags())
971 OS << " [TF=" << TF << ']';
972 } else if (const AddrSpaceCastSDNode *ASC =
973 dyn_cast<AddrSpaceCastSDNode>(this)) {
974 OS << '['
975 << ASC->getSrcAddressSpace()
976 << " -> "
977 << ASC->getDestAddressSpace()
978 << ']';
979 } else if (const auto *AA = dyn_cast<AssertAlignSDNode>(this)) {
980 OS << '<' << AA->getAlign().value() << '>';
981 }
982
983 if (VerboseDAGDumping) {
984 if (unsigned Order = getIROrder())
985 OS << " [ORD=" << Order << ']';
986
987 if (getNodeId() != -1)
988 OS << " [ID=" << getNodeId() << ']';
989 if (!(isa<ConstantSDNode>(this) || (isa<ConstantFPSDNode>(this))))
990 OS << " # D:" << isDivergent();
991
992 if (G && !G->GetDbgValues(this).empty()) {
993 OS << " [NoOfDbgValues=" << G->GetDbgValues(this).size() << ']';
994 for (SDDbgValue *Dbg : G->GetDbgValues(this))
995 if (!Dbg->isInvalidated())
996 Dbg->print(OS);
997 } else if (getHasDebugValue())
998 OS << " [NoOfDbgValues>0]";
999
1000 if (const auto *MD = G ? G->getPCSections(this) : nullptr) {
1001 OS << " [pcsections ";
1002 MD->printAsOperand(OS, G->getMachineFunction().getFunction().getParent());
1003 OS << ']';
1004 }
1005
1006 if (MDNode *MMRA = G ? G->getMMRAMetadata(this) : nullptr) {
1007 OS << " [mmra ";
1008 MMRA->printAsOperand(OS,
1009 G->getMachineFunction().getFunction().getParent());
1010 OS << ']';
1011 }
1012 }
1013}
1014
1015LLVM_DUMP_METHOD void SDDbgValue::print(raw_ostream &OS) const {
1016 OS << " DbgVal(Order=" << getOrder() << ')';
1017 if (isInvalidated())
1018 OS << "(Invalidated)";
1019 if (isEmitted())
1020 OS << "(Emitted)";
1021 OS << "(";
1022 bool Comma = false;
1023 for (const SDDbgOperand &Op : getLocationOps()) {
1024 if (Comma)
1025 OS << ", ";
1026 switch (Op.getKind()) {
1027 case SDDbgOperand::SDNODE:
1028 if (Op.getSDNode())
1029 OS << "SDNODE=" << PrintNodeId(*Op.getSDNode()) << ':' << Op.getResNo();
1030 else
1031 OS << "SDNODE";
1032 break;
1033 case SDDbgOperand::CONST:
1034 OS << "CONST";
1035 break;
1036 case SDDbgOperand::FRAMEIX:
1037 OS << "FRAMEIX=" << Op.getFrameIx();
1038 break;
1039 case SDDbgOperand::VREG:
1040 OS << "VREG=" << printReg(Op.getVReg());
1041 break;
1042 }
1043 Comma = true;
1044 }
1045 OS << ")";
1046 if (isIndirect()) OS << "(Indirect)";
1047 if (isVariadic())
1048 OS << "(Variadic)";
1049 OS << ":\"" << Var->getName() << '"';
1050#ifndef NDEBUG
1051 if (Expr->getNumElements())
1052 Expr->dump();
1053#endif
1054}
1055
1056#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1057LLVM_DUMP_METHOD void SDDbgValue::dump() const {
1058 if (isInvalidated())
1059 return;
1060 print(dbgs());
1061 dbgs() << "\n";
1062}
1063#endif
1064
1065/// Return true if this node is so simple that we should just print it inline
1066/// if it appears as an operand.
1067static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G) {
1068 // Avoid lots of cluttering when inline printing nodes with associated
1069 // DbgValues in verbose mode.
1070 if (VerboseDAGDumping && G && !G->GetDbgValues(&Node).empty())
1071 return false;
1072 if (Node.getOpcode() == ISD::EntryToken)
1073 return false;
1074 return Node.getNumOperands() == 0;
1075}
1076
1077#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1078static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
1079 for (const SDValue &Op : N->op_values()) {
1080 if (shouldPrintInline(*Op.getNode(), G))
1081 continue;
1082 if (Op.getNode()->hasOneUse())
1083 DumpNodes(Op.getNode(), indent+2, G);
1084 }
1085
1086 dbgs().indent(indent);
1087 N->dump(G);
1088}
1089
1090LLVM_DUMP_METHOD void SelectionDAG::dump(bool Sorted) const {
1091 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:\n";
1092
1093 auto dumpEachNode = [this](const SDNode &N) {
1094 if (!N.hasOneUse() && &N != getRoot().getNode() &&
1095 (!shouldPrintInline(N, this) || N.use_empty()))
1096 DumpNodes(&N, 2, this);
1097 };
1098
1099 if (Sorted) {
1100 SmallVector<const SDNode *> SortedNodes;
1101 SortedNodes.reserve(AllNodes.size());
1102 getTopologicallyOrderedNodes(SortedNodes);
1103 for (const SDNode *N : SortedNodes)
1104 dumpEachNode(*N);
1105 } else {
1106 for (const SDNode &N : allnodes())
1107 dumpEachNode(N);
1108 }
1109
1110 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
1111 dbgs() << "\n";
1112
1113 if (VerboseDAGDumping) {
1114 if (DbgBegin() != DbgEnd())
1115 dbgs() << "SDDbgValues:\n";
1116 for (auto *Dbg : make_range(DbgBegin(), DbgEnd()))
1117 Dbg->dump();
1118 if (ByvalParmDbgBegin() != ByvalParmDbgEnd())
1119 dbgs() << "Byval SDDbgValues:\n";
1120 for (auto *Dbg : make_range(ByvalParmDbgBegin(), ByvalParmDbgEnd()))
1121 Dbg->dump();
1122 }
1123 dbgs() << "\n";
1124}
1125#endif
1126
1127void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
1128 OS << PrintNodeId(*this) << ": ";
1129 print_types(OS, G);
1130 OS << " = " << getOperationName(G);
1131 print_details(OS, G);
1132}
1133
1134static bool printOperand(raw_ostream &OS, const SelectionDAG *G,
1135 const SDValue Value) {
1136 if (!Value.getNode()) {
1137 OS << "<null>";
1138 return false;
1139 }
1140
1141 if (shouldPrintInline(*Value.getNode(), G)) {
1142 OS << Value->getOperationName(G) << ':';
1143 Value->print_types(OS, G);
1144 Value->print_details(OS, G);
1145 return true;
1146 }
1147
1148 OS << PrintNodeId(*Value.getNode());
1149 if (unsigned RN = Value.getResNo())
1150 OS << ':' << RN;
1151 return false;
1152}
1153
1154#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1155using VisitedSDNodeSet = SmallPtrSet<const SDNode *, 32>;
1156
1157static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
1158 const SelectionDAG *G, VisitedSDNodeSet &once) {
1159 if (!once.insert(N).second) // If we've been here before, return now.
1160 return;
1161
1162 // Dump the current SDNode, but don't end the line yet.
1163 OS.indent(indent);
1164 N->printr(OS, G);
1165
1166 // Having printed this SDNode, walk the children:
1167 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
1168 if (i) OS << ",";
1169 OS << " ";
1170
1171 const SDValue Op = N->getOperand(i);
1172 bool printedInline = printOperand(OS, G, Op);
1173 if (printedInline)
1174 once.insert(Op.getNode());
1175 }
1176
1177 OS << "\n";
1178
1179 // Dump children that have grandchildren on their own line(s).
1180 for (const SDValue &Op : N->op_values())
1181 DumpNodesr(OS, Op.getNode(), indent+2, G, once);
1182}
1183
1184LLVM_DUMP_METHOD void SDNode::dumpr() const {
1185 VisitedSDNodeSet once;
1186 DumpNodesr(dbgs(), this, 0, nullptr, once);
1187}
1188
1189LLVM_DUMP_METHOD void SDNode::dumpr(const SelectionDAG *G) const {
1190 VisitedSDNodeSet once;
1191 DumpNodesr(dbgs(), this, 0, G, once);
1192}
1193#endif
1194
1195static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
1196 const SelectionDAG *G, unsigned depth,
1197 unsigned indent) {
1198 if (depth == 0)
1199 return;
1200
1201 OS.indent(indent);
1202
1203 N->print(OS, G);
1204
1205 for (const SDValue &Op : N->op_values()) {
1206 // Don't follow chain operands.
1207 if (Op.getValueType() == MVT::Other)
1208 continue;
1209 // Don't print children that were fully rendered inline.
1210 if (shouldPrintInline(*Op.getNode(), G))
1211 continue;
1212 OS << '\n';
1213 printrWithDepthHelper(OS, Op.getNode(), G, depth - 1, indent + 2);
1214 }
1215}
1216
1217void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
1218 unsigned depth) const {
1219 printrWithDepthHelper(OS, this, G, depth, 0);
1220}
1221
1222void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
1223 // Don't print impossibly deep things.
1224 printrWithDepth(OS, G, 10);
1225}
1226
1227#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1228LLVM_DUMP_METHOD
1229void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
1230 printrWithDepth(dbgs(), G, depth);
1231}
1232
1233LLVM_DUMP_METHOD void SDNode::dumprFull(const SelectionDAG *G) const {
1234 // Don't print impossibly deep things.
1235 dumprWithDepth(G, 10);
1236}
1237#endif
1238
1239void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
1240 printr(OS, G);
1241 // Under VerboseDAGDumping divergence will be printed always.
1242 if (isDivergent() && !VerboseDAGDumping)
1243 OS << " # D:1";
1244 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
1245 if (i) OS << ", "; else OS << " ";
1246 printOperand(OS, G, getOperand(i));
1247 }
1248 if (DebugLoc DL = getDebugLoc()) {
1249 OS << ", ";
1250 DL.print(OS);
1251 }
1252 if (PrintSDNodeAddrs)
1253 OS << " ; " << this;
1254}
APFloat.h
This file declares a class to represent arbitrary precision floating point values and provide a varie...
APInt.h
This file implements a class to represent arbitrary precision integral constant values and operations...
Scaled
@ Scaled
Definition ARCInstrInfo.cpp:35
DL
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Definition ARMSLSHardening.cpp:73
A
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
LLVM_DUMP_METHOD
#define LLVM_DUMP_METHOD
Mark debug helper function definitions like dump() that should not be stripped from debug builds.
Definition Compiler.h:661
Constants.h
This file contains the declarations for the subclasses of Constant, which represent the different fla...
TII
const HexagonInstrInfo * TII
Definition HexagonCopyToCombine.cpp:118
hasNoSignedWrap
static bool hasNoSignedWrap(BinaryOperator &I)
Definition InstructionCombining.cpp:390
hasNoUnsignedWrap
static bool hasNoUnsignedWrap(BinaryOperator &I)
Definition InstructionCombining.cpp:385
G
#define G(x, y, z)
Definition MD5.cpp:55
MachineConstantPool.h
This file declares the MachineConstantPool class which is an abstract constant pool to keep track of ...
PrintNodeId
static Printable PrintNodeId(const SDNode &Node)
Definition SelectionDAGDumper.cpp:631
VisitedSDNodeSet
SmallPtrSet< const SDNode *, 32 > VisitedSDNodeSet
Definition SelectionDAGDumper.cpp:1155
VerboseDAGDumping
static cl::opt< bool > VerboseDAGDumping("dag-dump-verbose", cl::Hidden, cl::desc("Display more information when dumping selection " "DAG nodes."))
printOperand
static bool printOperand(raw_ostream &OS, const SelectionDAG *G, const SDValue Value)
Definition SelectionDAGDumper.cpp:1134
shouldPrintInline
static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G)
Return true if this node is so simple that we should just print it inline if it appears as an operand...
Definition SelectionDAGDumper.cpp:1067
DumpNodesr
static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, const SelectionDAG *G, VisitedSDNodeSet &once)
Definition SelectionDAGDumper.cpp:1157
PrintSDNodeAddrs
static cl::opt< bool > PrintSDNodeAddrs("print-sdnode-addrs", cl::Hidden, cl::desc("Print addresses of SDNodes when dumping"))
printMemOperand
static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO, const MachineFunction *MF, const Module *M, const MachineFrameInfo *MFI, const TargetInstrInfo *TII, LLVMContext &Ctx)
Definition SelectionDAGDumper.cpp:649
DumpNodes
static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G)
Definition SelectionDAGDumper.cpp:1078
printrWithDepthHelper
static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, const SelectionDAG *G, unsigned depth, unsigned indent)
Definition SelectionDAGDumper.cpp:1195
SmallPtrSet.h
This file defines the SmallPtrSet class.
StringExtras.h
This file contains some functions that are useful when dealing with strings.
TargetLowering.h
This file describes how to lower LLVM code to machine code.
llvm::APFloatBase::IEEEsingle
static const fltSemantics & IEEEsingle()
Definition APFloat.h:296
llvm::APFloatBase::IEEEdouble
static const fltSemantics & IEEEdouble()
Definition APFloat.h:297
llvm::DebugLoc
A debug info location.
Definition DebugLoc.h:123
llvm::GlobalValue::getParent
Module * getParent()
Get the module that this global value is contained inside of...
Definition GlobalValue.h:663
llvm::LLVMContext
This is an important class for using LLVM in a threaded context.
Definition LLVMContext.h:68
llvm::LoadSDNode
This class is used to represent ISD::LOAD nodes.
Definition SelectionDAGNodes.h:2635
llvm::MDNode
Metadata node.
Definition Metadata.h:1080
llvm::MachineFrameInfo
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
Definition MachineFrameInfo.h:111
llvm::MachineFunction::getFrameInfo
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
Definition MachineFunction.h:807
llvm::MachineFunction::getFunction
Function & getFunction()
Return the LLVM function that this machine code represents.
Definition MachineFunction.h:752
llvm::MachineMemOperand
A description of a memory reference used in the backend.
Definition MachineMemOperand.h:130
llvm::MachineMemOperand::print
LLVM_ABI void print(raw_ostream &OS, ModuleSlotTracker &MST, SmallVectorImpl< StringRef > &SSNs, const LLVMContext &Context, const MachineFrameInfo *MFI, const TargetInstrInfo *TII) const
Support for operator<<.
Definition MachineOperand.cpp:1170
llvm::MachineSDNode
An SDNode that represents everything that will be needed to construct a MachineInstr.
Definition SelectionDAGNodes.h:3245
llvm::MachineSDNode::mmo_iterator
ArrayRef< MachineMemOperand * >::const_iterator mmo_iterator
Definition SelectionDAGNodes.h:3275
llvm::MaskedLoadSDNode
This class is used to represent an MLOAD node.
Definition SelectionDAGNodes.h:2942
llvm::MaskedStoreSDNode
This class is used to represent an MSTORE node.
Definition SelectionDAGNodes.h:2971
llvm::MemSDNode
This is an abstract virtual class for memory operations.
Definition SelectionDAGNodes.h:1413
llvm::ModuleSlotTracker
Manage lifetime of a slot tracker for printing IR.
Definition ModuleSlotTracker.h:45
llvm::ModuleSlotTracker::incorporateFunction
void incorporateFunction(const Function &F)
Incorporate the given function.
Definition AsmWriter.cpp:991
llvm::Module
A Module instance is used to store all the information related to an LLVM module.
Definition Module.h:67
llvm::Printable
Simple wrapper around std::function<void(raw_ostream&)>.
Definition Printable.h:38
llvm::SDDbgOperand
Holds the information for a single machine location through SDISel; either an SDNode,...
Definition SDNodeDbgValue.h:32
llvm::SDDbgOperand::VREG
@ VREG
Value is a virtual register.
Definition SDNodeDbgValue.h:38
llvm::SDDbgOperand::FRAMEIX
@ FRAMEIX
Value is contents of a stack location.
Definition SDNodeDbgValue.h:37
llvm::SDDbgOperand::SDNODE
@ SDNODE
Value is the result of an expression.
Definition SDNodeDbgValue.h:35
llvm::SDDbgOperand::CONST
@ CONST
Value is a constant.
Definition SDNodeDbgValue.h:36
llvm::SDDbgValue
Holds the information from a dbg_value node through SDISel.
Definition SDNodeDbgValue.h:134
llvm::SDDbgValue::isEmitted
bool isEmitted() const
Definition SDNodeDbgValue.h:230
llvm::SDDbgValue::print
LLVM_DUMP_METHOD void print(raw_ostream &OS) const
Definition SelectionDAGDumper.cpp:1015
llvm::SDDbgValue::getOrder
unsigned getOrder() const
Returns the SDNodeOrder.
Definition SDNodeDbgValue.h:219
llvm::SDDbgValue::dump
LLVM_DUMP_METHOD void dump() const
Definition SelectionDAGDumper.cpp:1057
llvm::SDDbgValue::isInvalidated
bool isInvalidated() const
Definition SDNodeDbgValue.h:225
llvm::SDDbgValue::getLocationOps
ArrayRef< SDDbgOperand > getLocationOps() const
Definition SDNodeDbgValue.h:186
llvm::SDDbgValue::isIndirect
bool isIndirect() const
Returns whether this is an indirect value.
Definition SDNodeDbgValue.h:210
llvm::SDDbgValue::isVariadic
bool isVariadic() const
Definition SDNodeDbgValue.h:212
llvm::SDNode
Represents one node in the SelectionDAG.
Definition SelectionDAGNodes.h:517
llvm::SDNode::isMachineOpcode
bool isMachineOpcode() const
Test if this node has a post-isel opcode, directly corresponding to a MachineInstr opcode.
Definition SelectionDAGNodes.h:761
llvm::SDNode::dumprFull
LLVM_ABI void dumprFull(const SelectionDAG *G=nullptr) const
printrFull to dbgs().
Definition SelectionDAGDumper.cpp:1233
llvm::SDNode::getNodeId
int getNodeId() const
Return the unique node id.
Definition SelectionDAGNodes.h:787
llvm::SDNode::dump
LLVM_ABI void dump() const
Dump this node, for debugging.
Definition SelectionDAGDumper.cpp:675
llvm::SDNode::getOpcode
unsigned getOpcode() const
Return the SelectionDAG opcode value for this node.
Definition SelectionDAGNodes.h:708
llvm::SDNode::isDivergent
bool isDivergent() const
Definition SelectionDAGNodes.h:774
llvm::SDNode::getIndexedModeName
static LLVM_ABI const char * getIndexedModeName(ISD::MemIndexedMode AM)
Definition SelectionDAGDumper.cpp:621
llvm::SDNode::getIROrder
unsigned getIROrder() const
Return the node ordering.
Definition SelectionDAGNodes.h:799
llvm::SDNode::getHasDebugValue
bool getHasDebugValue() const
Definition SelectionDAGNodes.h:771
llvm::SDNode::dumpr
LLVM_ABI void dumpr() const
Dump (recursively) this node and its use-def subgraph.
Definition SelectionDAGDumper.cpp:1184
llvm::SDNode::getFlags
SDNodeFlags getFlags() const
Definition SelectionDAGNodes.h:1101
llvm::SDNode::getOperationName
LLVM_ABI std::string getOperationName(const SelectionDAG *G=nullptr) const
Return the opcode of this operation for printing.
Definition SelectionDAGDumper.cpp:62
llvm::SDNode::printrFull
LLVM_ABI void printrFull(raw_ostream &O, const SelectionDAG *G=nullptr) const
Print a SelectionDAG node and all children down to the leaves.
Definition SelectionDAGDumper.cpp:1222
llvm::SDNode::SelectionDAG
friend class SelectionDAG
Definition SelectionDAGNodes.h:658
llvm::SDNode::printr
LLVM_ABI void printr(raw_ostream &OS, const SelectionDAG *G=nullptr) const
Definition SelectionDAGDumper.cpp:1127
llvm::SDNode::getAsZExtVal
uint64_t getAsZExtVal() const
Helper method returns the zero-extended integer value of a ConstantSDNode.
Definition SelectionDAGNodes.h:1853
llvm::SDNode::getNumValues
unsigned getNumValues() const
Return the number of values defined/returned by this operator.
Definition SelectionDAGNodes.h:1117
llvm::SDNode::getNumOperands
unsigned getNumOperands() const
Return the number of values used by this operation.
Definition SelectionDAGNodes.h:1029
llvm::SDNode::getMachineOpcode
unsigned getMachineOpcode() const
This may only be called if isMachineOpcode returns true.
Definition SelectionDAGNodes.h:766
llvm::SDNode::getOperand
const SDValue & getOperand(unsigned Num) const
Definition SelectionDAGNodes.h:1050
llvm::SDNode::print
LLVM_ABI void print(raw_ostream &OS, const SelectionDAG *G=nullptr) const
Definition SelectionDAGDumper.cpp:1239
llvm::SDNode::getDebugLoc
const DebugLoc & getDebugLoc() const
Return the source location info.
Definition SelectionDAGNodes.h:805
llvm::SDNode::printrWithDepth
LLVM_ABI void printrWithDepth(raw_ostream &O, const SelectionDAG *G=nullptr, unsigned depth=100) const
Print a SelectionDAG node and children up to depth "depth." The given SelectionDAG allows target-spec...
Definition SelectionDAGDumper.cpp:1217
llvm::SDNode::dumprWithDepth
LLVM_ABI void dumprWithDepth(const SelectionDAG *G=nullptr, unsigned depth=100) const
printrWithDepth to dbgs().
Definition SelectionDAGDumper.cpp:1229
llvm::SDNode::getValueType
EVT getValueType(unsigned ResNo) const
Return the type of a specified result.
Definition SelectionDAGNodes.h:1120
llvm::SDNode::print_details
LLVM_ABI void print_details(raw_ostream &OS, const SelectionDAG *G) const
Definition SelectionDAGDumper.cpp:693
llvm::SDNode::print_types
LLVM_ABI void print_types(raw_ostream &OS, const SelectionDAG *G) const
Definition SelectionDAGDumper.cpp:683
llvm::SDValue
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation.
Definition SelectionDAGNodes.h:147
llvm::SelectionDAGTargetInfo
Targets can subclass this to parameterize the SelectionDAG lowering and instruction selection process...
Definition SelectionDAGTargetInfo.h:33
llvm::SelectionDAGTargetInfo::getTargetNodeName
virtual const char * getTargetNodeName(unsigned Opcode) const
Returns the name of the given target-specific opcode, suitable for debug printing.
Definition SelectionDAGTargetInfo.h:42
llvm::SelectionDAG
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
Definition SelectionDAG.h:229
llvm::SelectionDAG::getRoot
const SDValue & getRoot() const
Return the root tag of the SelectionDAG.
Definition SelectionDAG.h:599
llvm::SelectionDAG::ByvalParmDbgEnd
SDDbgInfo::DbgIterator ByvalParmDbgEnd() const
Definition SelectionDAG.h:2071
llvm::SelectionDAG::ByvalParmDbgBegin
SDDbgInfo::DbgIterator ByvalParmDbgBegin() const
Definition SelectionDAG.h:2068
llvm::SelectionDAG::dump
LLVM_ABI void dump(bool Sorted=false) const
Dump the textual format of this DAG.
Definition SelectionDAGDumper.cpp:1090
llvm::SelectionDAG::DbgEnd
SDDbgInfo::DbgIterator DbgEnd() const
Definition SelectionDAG.h:2066
llvm::SelectionDAG::DbgBegin
SDDbgInfo::DbgIterator DbgBegin() const
Definition SelectionDAG.h:2065
llvm::SelectionDAG::allnodes
iterator_range< allnodes_iterator > allnodes()
Definition SelectionDAG.h:591
llvm::SelectionDAG::getNode
LLVM_ABI SDValue getNode(unsigned Opcode, const SDLoc &DL, EVT VT, ArrayRef< SDUse > Ops)
Gets or creates the specified node.
Definition SelectionDAG.cpp:11259
llvm::SelectionDAG::getTopologicallyOrderedNodes
LLVM_ABI void getTopologicallyOrderedNodes(SmallVectorImpl< const SDNode * > &SortedNodes) const
Get all the nodes in their topological order without modifying any states.
Definition SelectionDAG.cpp:13072
llvm::ShuffleVectorSDNode
This SDNode is used to implement the code generator support for the llvm IR shufflevector instruction...
Definition SelectionDAGNodes.h:1750
llvm::SmallPtrSetImpl::insert
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
Definition SmallPtrSet.h:389
llvm::SmallPtrSet
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
Definition SmallPtrSet.h:527
llvm::SmallVectorImpl::reserve
void reserve(size_type N)
Definition SmallVector.h:666
llvm::SmallVector
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition SmallVector.h:1205
llvm::SrcValueSDNode
An SDNode that holds an arbitrary LLVM IR Value.
Definition SelectionDAGNodes.h:2416
llvm::StoreSDNode
This class is used to represent ISD::STORE nodes.
Definition SelectionDAGNodes.h:2663
llvm::StringRef::str
std::string str() const
str - Get the contents as an std::string.
Definition StringRef.h:222
llvm::TargetIndexSDNode
Completely target-dependent object reference.
Definition SelectionDAGNodes.h:2232
llvm::TargetInstrInfo
TargetInstrInfo - Interface to description of machine instruction set.
Definition TargetInstrInfo.h:115
llvm::TargetLowering
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
Definition TargetLowering.h:3985
llvm::TargetLowering::getTargetNodeName
virtual const char * getTargetNodeName(unsigned Opcode) const
This method returns the name of a target specific DAG node.
Definition TargetLowering.cpp:51
llvm::VTSDNode
This class is used to represent EVT's, which are used to parameterize some operations.
Definition SelectionDAGNodes.h:2584
llvm::Value
LLVM Value Representation.
Definition Value.h:75
llvm::Value::getName
LLVM_ABI StringRef getName() const
Return a constant reference to the value's name.
Definition Value.cpp:322
llvm::raw_ostream
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition raw_ostream.h:53
llvm::raw_ostream::Colors
Colors
Definition raw_ostream.h:94
llvm::raw_ostream::changeColor
virtual raw_ostream & changeColor(enum Colors Color, bool Bold=false, bool BG=false)
Changes the foreground color of text that will be output from this point forward.
Definition raw_ostream.cpp:510
llvm::raw_ostream::resetColor
virtual raw_ostream & resetColor()
Resets the colors to terminal defaults.
Definition raw_ostream.cpp:523
llvm::raw_ostream::BLACK
static constexpr Colors BLACK
Definition raw_ostream.h:115
llvm::raw_ostream::GREEN
static constexpr Colors GREEN
Definition raw_ostream.h:117
llvm::raw_ostream::indent
raw_ostream & indent(unsigned NumSpaces)
indent - Insert 'NumSpaces' spaces.
Definition raw_ostream.cpp:485
llvm::raw_ostream::BLUE
static constexpr Colors BLUE
Definition raw_ostream.h:119
llvm::raw_ostream::RED
static constexpr Colors RED
Definition raw_ostream.h:116
llvm::raw_ostream::MAGENTA
static constexpr Colors MAGENTA
Definition raw_ostream.h:120
llvm::raw_ostream::YELLOW
static constexpr Colors YELLOW
Definition raw_ostream.h:118
llvm::raw_ostream::CYAN
static constexpr Colors CYAN
Definition raw_ostream.h:121
llvm_unreachable
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Definition ErrorHandling.h:164
llvm::AA
Abstract Attribute helper functions.
Definition Attributor.h:165
llvm::ISD::SETCC
@ SETCC
SetCC operator - This evaluates to a true value iff the condition is true.
Definition ISDOpcodes.h:819
llvm::ISD::MERGE_VALUES
@ MERGE_VALUES
MERGE_VALUES - This node takes multiple discrete operands and returns them all as its individual resu...
Definition ISDOpcodes.h:261
llvm::ISD::STACKRESTORE
@ STACKRESTORE
STACKRESTORE has two operands, an input chain and a pointer to restore to it returns an output chain.
Definition ISDOpcodes.h:1260
llvm::ISD::STACKSAVE
@ STACKSAVE
STACKSAVE - STACKSAVE has one operand, an input chain.
Definition ISDOpcodes.h:1256
llvm::ISD::CTLZ_ZERO_UNDEF
@ CTLZ_ZERO_UNDEF
Definition ISDOpcodes.h:788
llvm::ISD::TargetConstantPool
@ TargetConstantPool
Definition ISDOpcodes.h:189
llvm::ISD::CONVERGENCECTRL_ANCHOR
@ CONVERGENCECTRL_ANCHOR
The llvm.experimental.convergence.* intrinsics.
Definition ISDOpcodes.h:1567
llvm::ISD::MDNODE_SDNODE
@ MDNODE_SDNODE
MDNODE_SDNODE - This is a node that holdes an MDNode*, which is used to reference metadata in the IR.
Definition ISDOpcodes.h:1305
llvm::ISD::STRICT_FSETCC
@ STRICT_FSETCC
STRICT_FSETCC/STRICT_FSETCCS - Constrained versions of SETCC, used for floating-point operands only.
Definition ISDOpcodes.h:511
llvm::ISD::PTRADD
@ PTRADD
PTRADD represents pointer arithmetic semantics, for targets that opt in using shouldPreservePtrArith(...
Definition ISDOpcodes.h:1557
llvm::ISD::DELETED_NODE
@ DELETED_NODE
DELETED_NODE - This is an illegal value that is used to catch errors.
Definition ISDOpcodes.h:45
llvm::ISD::POISON
@ POISON
POISON - A poison node.
Definition ISDOpcodes.h:236
llvm::ISD::SET_FPENV
@ SET_FPENV
Sets the current floating-point environment.
Definition ISDOpcodes.h:1132
llvm::ISD::PARTIAL_REDUCE_SMLA
@ PARTIAL_REDUCE_SMLA
PARTIAL_REDUCE_[U|S]MLA(Accumulator, Input1, Input2) The partial reduction nodes sign or zero extend ...
Definition ISDOpcodes.h:1538
llvm::ISD::LOOP_DEPENDENCE_RAW_MASK
@ LOOP_DEPENDENCE_RAW_MASK
Definition ISDOpcodes.h:1610
llvm::ISD::VECREDUCE_SEQ_FADD
@ VECREDUCE_SEQ_FADD
Generic reduction nodes.
Definition ISDOpcodes.h:1486
llvm::ISD::COND_LOOP
@ COND_LOOP
COND_LOOP is a conditional branch to self, used for implementing efficient conditional traps.
Definition ISDOpcodes.h:1452
llvm::ISD::MLOAD
@ MLOAD
Masked load and store - consecutive vector load and store operations with additional mask operand tha...
Definition ISDOpcodes.h:1425
llvm::ISD::EH_SJLJ_LONGJMP
@ EH_SJLJ_LONGJMP
OUTCHAIN = EH_SJLJ_LONGJMP(INCHAIN, buffer) This corresponds to the eh.sjlj.longjmp intrinsic.
Definition ISDOpcodes.h:168
llvm::ISD::FGETSIGN
@ FGETSIGN
INT = FGETSIGN(FP) - Return the sign bit of the specified floating point value as an integer 0/1 valu...
Definition ISDOpcodes.h:538
llvm::ISD::SMUL_LOHI
@ SMUL_LOHI
SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing a signed/unsigned value of type i[2...
Definition ISDOpcodes.h:275
llvm::ISD::INSERT_SUBVECTOR
@ INSERT_SUBVECTOR
INSERT_SUBVECTOR(VECTOR1, VECTOR2, IDX) - Returns a vector with VECTOR2 inserted into VECTOR1.
Definition ISDOpcodes.h:600
llvm::ISD::STACKADDRESS
@ STACKADDRESS
STACKADDRESS - Represents the llvm.stackaddress intrinsic.
Definition ISDOpcodes.h:127
llvm::ISD::JUMP_TABLE_DEBUG_INFO
@ JUMP_TABLE_DEBUG_INFO
JUMP_TABLE_DEBUG_INFO - Jumptable debug info.
Definition ISDOpcodes.h:1194
llvm::ISD::BSWAP
@ BSWAP
Byte Swap and Counting operators.
Definition ISDOpcodes.h:779
llvm::ISD::SMULFIX
@ SMULFIX
RESULT = [US]MULFIX(LHS, RHS, SCALE) - Perform fixed point multiplication on 2 integers with the same...
Definition ISDOpcodes.h:394
llvm::ISD::VAEND
@ VAEND
VAEND, VASTART - VAEND and VASTART have three operands: an input chain, pointer, and a SRCVALUE.
Definition ISDOpcodes.h:1289
llvm::ISD::TargetBlockAddress
@ TargetBlockAddress
Definition ISDOpcodes.h:191
llvm::ISD::ATOMIC_STORE
@ ATOMIC_STORE
OUTCHAIN = ATOMIC_STORE(INCHAIN, val, ptr) This corresponds to "store atomic" instruction.
Definition ISDOpcodes.h:1375
llvm::ISD::ADDC
@ ADDC
Carry-setting nodes for multiple precision addition and subtraction.
Definition ISDOpcodes.h:294
llvm::ISD::FRAME_TO_ARGS_OFFSET
@ FRAME_TO_ARGS_OFFSET
FRAME_TO_ARGS_OFFSET - This node represents offset from frame pointer to first (possible) on-stack ar...
Definition ISDOpcodes.h:145
llvm::ISD::RESET_FPENV
@ RESET_FPENV
Set floating-point environment to default state.
Definition ISDOpcodes.h:1136
llvm::ISD::FMAD
@ FMAD
FMAD - Perform a * b + c, while getting the same result as the separately rounded operations.
Definition ISDOpcodes.h:522
llvm::ISD::ADD
@ ADD
Simple integer binary arithmetic operators.
Definition ISDOpcodes.h:264
llvm::ISD::LOAD
@ LOAD
LOAD and STORE have token chains as their first operand, then the same operands as an LLVM load/store...
Definition ISDOpcodes.h:1165
llvm::ISD::SMULFIXSAT
@ SMULFIXSAT
Same as the corresponding unsaturated fixed point instructions, but the result is clamped between the...
Definition ISDOpcodes.h:400
llvm::ISD::SET_FPMODE
@ SET_FPMODE
Sets the current dynamic floating-point control modes.
Definition ISDOpcodes.h:1155
llvm::ISD::ANY_EXTEND
@ ANY_EXTEND
ANY_EXTEND - Used for integer types. The high bits are undefined.
Definition ISDOpcodes.h:853
llvm::ISD::ATOMIC_LOAD_USUB_COND
@ ATOMIC_LOAD_USUB_COND
Definition ISDOpcodes.h:1416
llvm::ISD::FMA
@ FMA
FMA - Perform a * b + c with no intermediate rounding step.
Definition ISDOpcodes.h:518
llvm::ISD::VECTOR_FIND_LAST_ACTIVE
@ VECTOR_FIND_LAST_ACTIVE
Finds the index of the last active mask element Operands: Mask.
Definition ISDOpcodes.h:1582
llvm::ISD::FMODF
@ FMODF
FMODF - Decomposes the operand into integral and fractional parts, each having the same type and sign...
Definition ISDOpcodes.h:1122
llvm::ISD::FATAN2
@ FATAN2
FATAN2 - atan2, inspired by libm.
Definition ISDOpcodes.h:1044
llvm::ISD::FSINCOSPI
@ FSINCOSPI
FSINCOSPI - Compute both the sine and cosine times pi more accurately than FSINCOS(pi*x),...
Definition ISDOpcodes.h:1118
llvm::ISD::INTRINSIC_VOID
@ INTRINSIC_VOID
OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...) This node represents a target intrin...
Definition ISDOpcodes.h:220
llvm::ISD::EH_SJLJ_SETUP_DISPATCH
@ EH_SJLJ_SETUP_DISPATCH
OUTCHAIN = EH_SJLJ_SETUP_DISPATCH(INCHAIN) The target initializes the dispatch table here.
Definition ISDOpcodes.h:172
llvm::ISD::GlobalAddress
@ GlobalAddress
Definition ISDOpcodes.h:88
llvm::ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS
@ ATOMIC_CMP_SWAP_WITH_SUCCESS
Val, Success, OUTCHAIN = ATOMIC_CMP_SWAP_WITH_SUCCESS(INCHAIN, ptr, cmp, swap) N.b.
Definition ISDOpcodes.h:1388
llvm::ISD::STRICT_FMINIMUM
@ STRICT_FMINIMUM
Definition ISDOpcodes.h:471
llvm::ISD::SINT_TO_FP
@ SINT_TO_FP
[SU]INT_TO_FP - These operators convert integers (whose interpreted sign depends on the first letter)...
Definition ISDOpcodes.h:880
llvm::ISD::CONCAT_VECTORS
@ CONCAT_VECTORS
CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of vector type with the same length ...
Definition ISDOpcodes.h:584
llvm::ISD::VECREDUCE_FMAX
@ VECREDUCE_FMAX
FMIN/FMAX nodes can have flags, for NaN/NoNaN variants.
Definition ISDOpcodes.h:1504
llvm::ISD::FADD
@ FADD
Simple binary floating point operators.
Definition ISDOpcodes.h:417
llvm::ISD::VECREDUCE_FMAXIMUM
@ VECREDUCE_FMAXIMUM
FMINIMUM/FMAXIMUM nodes propatate NaNs and signed zeroes using the llvm.minimum and llvm....
Definition ISDOpcodes.h:1508
llvm::ISD::ABS
@ ABS
ABS - Determine the unsigned absolute value of a signed integer value of the same bitwidth.
Definition ISDOpcodes.h:747
llvm::ISD::MEMBARRIER
@ MEMBARRIER
MEMBARRIER - Compiler barrier only; generate a no-op.
Definition ISDOpcodes.h:1362
llvm::ISD::ATOMIC_FENCE
@ ATOMIC_FENCE
OUTCHAIN = ATOMIC_FENCE(INCHAIN, ordering, scope) This corresponds to the fence instruction.
Definition ISDOpcodes.h:1367
llvm::ISD::RESET_FPMODE
@ RESET_FPMODE
Sets default dynamic floating-point control modes.
Definition ISDOpcodes.h:1159
llvm::ISD::SIGN_EXTEND_VECTOR_INREG
@ SIGN_EXTEND_VECTOR_INREG
SIGN_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register sign-extension of the low ...
Definition ISDOpcodes.h:910
llvm::ISD::SDIVREM
@ SDIVREM
SDIVREM/UDIVREM - Divide two integers and produce both a quotient and remainder result.
Definition ISDOpcodes.h:280
llvm::ISD::FP16_TO_FP
@ FP16_TO_FP
FP16_TO_FP, FP_TO_FP16 - These operators are used to perform promotions and truncation for half-preci...
Definition ISDOpcodes.h:1003
llvm::ISD::FMULADD
@ FMULADD
FMULADD - Performs a * b + c, with, or without, intermediate rounding.
Definition ISDOpcodes.h:528
llvm::ISD::FPTRUNC_ROUND
@ FPTRUNC_ROUND
FPTRUNC_ROUND - This corresponds to the fptrunc_round intrinsic.
Definition ISDOpcodes.h:515
llvm::ISD::FAKE_USE
@ FAKE_USE
FAKE_USE represents a use of the operand but does not do anything.
Definition ISDOpcodes.h:1448
llvm::ISD::BITCAST
@ BITCAST
BITCAST - This operator converts between integer, vector and FP values, as if the value was stored to...
Definition ISDOpcodes.h:993
llvm::ISD::BUILD_PAIR
@ BUILD_PAIR
BUILD_PAIR - This is the opposite of EXTRACT_ELEMENT in some ways.
Definition ISDOpcodes.h:254
llvm::ISD::CLMUL
@ CLMUL
Carry-less multiplication operations.
Definition ISDOpcodes.h:774
llvm::ISD::INIT_TRAMPOLINE
@ INIT_TRAMPOLINE
INIT_TRAMPOLINE - This corresponds to the init_trampoline intrinsic.
Definition ISDOpcodes.h:1333
llvm::ISD::FLDEXP
@ FLDEXP
FLDEXP - ldexp, inspired by libm (op0 * 2**op1).
Definition ISDOpcodes.h:1042
llvm::ISD::SDIVFIX
@ SDIVFIX
RESULT = [US]DIVFIX(LHS, RHS, SCALE) - Perform fixed point division on 2 integers with the same width...
Definition ISDOpcodes.h:407
llvm::ISD::STRICT_FSQRT
@ STRICT_FSQRT
Constrained versions of libm-equivalent floating point intrinsics.
Definition ISDOpcodes.h:438
llvm::ISD::BUILTIN_OP_END
@ BUILTIN_OP_END
BUILTIN_OP_END - This must be the last enum value in this list.
Definition ISDOpcodes.h:1623
llvm::ISD::GlobalTLSAddress
@ GlobalTLSAddress
Definition ISDOpcodes.h:89
llvm::ISD::SRCVALUE
@ SRCVALUE
SRCVALUE - This is a node type that holds a Value* that is used to make reference to a value in the L...
Definition ISDOpcodes.h:1301
llvm::ISD::CONVERT_FROM_ARBITRARY_FP
@ CONVERT_FROM_ARBITRARY_FP
CONVERT_FROM_ARBITRARY_FP - This operator converts from an arbitrary floating-point represented as an...
Definition ISDOpcodes.h:1021
llvm::ISD::EH_LABEL
@ EH_LABEL
EH_LABEL - Represents a label in mid basic block used to track locations needed for debug and excepti...
Definition ISDOpcodes.h:1236
llvm::ISD::ATOMIC_LOAD_USUB_SAT
@ ATOMIC_LOAD_USUB_SAT
Definition ISDOpcodes.h:1417
llvm::ISD::EH_RETURN
@ EH_RETURN
OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents 'eh_return' gcc dwarf builtin,...
Definition ISDOpcodes.h:156
llvm::ISD::ANNOTATION_LABEL
@ ANNOTATION_LABEL
ANNOTATION_LABEL - Represents a mid basic block label used by annotations.
Definition ISDOpcodes.h:1242
llvm::ISD::SET_ROUNDING
@ SET_ROUNDING
Set rounding mode.
Definition ISDOpcodes.h:975
llvm::ISD::CONVERGENCECTRL_GLUE
@ CONVERGENCECTRL_GLUE
This does not correspond to any convergence control intrinsic.
Definition ISDOpcodes.h:1573
llvm::ISD::PARTIAL_REDUCE_UMLA
@ PARTIAL_REDUCE_UMLA
Definition ISDOpcodes.h:1539
llvm::ISD::SIGN_EXTEND
@ SIGN_EXTEND
Conversion operators.
Definition ISDOpcodes.h:844
llvm::ISD::AVGCEILS
@ AVGCEILS
AVGCEILS/AVGCEILU - Rounding averaging add - Add two integers using an integer of type i[N+2],...
Definition ISDOpcodes.h:715
llvm::ISD::STRICT_UINT_TO_FP
@ STRICT_UINT_TO_FP
Definition ISDOpcodes.h:485
llvm::ISD::SCALAR_TO_VECTOR
@ SCALAR_TO_VECTOR
SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a scalar value into element 0 of the...
Definition ISDOpcodes.h:665
llvm::ISD::PREALLOCATED_SETUP
@ PREALLOCATED_SETUP
PREALLOCATED_SETUP - This has 2 operands: an input chain and a SRCVALUE with the preallocated call Va...
Definition ISDOpcodes.h:1294
llvm::ISD::READSTEADYCOUNTER
@ READSTEADYCOUNTER
READSTEADYCOUNTER - This corresponds to the readfixedcounter intrinsic.
Definition ISDOpcodes.h:1322
llvm::ISD::ADDROFRETURNADDR
@ ADDROFRETURNADDR
ADDROFRETURNADDR - Represents the llvm.addressofreturnaddress intrinsic.
Definition ISDOpcodes.h:117
llvm::ISD::TargetExternalSymbol
@ TargetExternalSymbol
Definition ISDOpcodes.h:190
llvm::ISD::CONVERGENCECTRL_ENTRY
@ CONVERGENCECTRL_ENTRY
Definition ISDOpcodes.h:1568
llvm::ISD::BR
@ BR
Control flow instructions. These all have token chains.
Definition ISDOpcodes.h:1181
llvm::ISD::VECREDUCE_FADD
@ VECREDUCE_FADD
These reductions have relaxed evaluation order semantics, and have a single vector operand.
Definition ISDOpcodes.h:1501
llvm::ISD::CTTZ_ZERO_UNDEF
@ CTTZ_ZERO_UNDEF
Bit counting operators with an undefined result for zero inputs.
Definition ISDOpcodes.h:787
llvm::ISD::TargetJumpTable
@ TargetJumpTable
Definition ISDOpcodes.h:188
llvm::ISD::TargetIndex
@ TargetIndex
TargetIndex - Like a constant pool entry, but with completely target-dependent semantics.
Definition ISDOpcodes.h:198
llvm::ISD::PARTIAL_REDUCE_FMLA
@ PARTIAL_REDUCE_FMLA
Definition ISDOpcodes.h:1541
llvm::ISD::PREFETCH
@ PREFETCH
PREFETCH - This corresponds to a prefetch intrinsic.
Definition ISDOpcodes.h:1355
llvm::ISD::TRUNCATE_SSAT_U
@ TRUNCATE_SSAT_U
Definition ISDOpcodes.h:873
llvm::ISD::FSINCOS
@ FSINCOS
FSINCOS - Compute both fsin and fcos as a single operation.
Definition ISDOpcodes.h:1114
llvm::ISD::SETCCCARRY
@ SETCCCARRY
Like SetCC, ops #0 and #1 are the LHS and RHS operands to compare, but op #2 is a boolean indicating ...
Definition ISDOpcodes.h:827
llvm::ISD::FNEG
@ FNEG
Perform various unary floating-point operations inspired by libm.
Definition ISDOpcodes.h:1026
llvm::ISD::BR_CC
@ BR_CC
BR_CC - Conditional branch.
Definition ISDOpcodes.h:1211
llvm::ISD::SSUBO
@ SSUBO
Same for subtraction.
Definition ISDOpcodes.h:352
llvm::ISD::PREALLOCATED_ARG
@ PREALLOCATED_ARG
PREALLOCATED_ARG - This has 3 operands: an input chain, a SRCVALUE with the preallocated call Value,...
Definition ISDOpcodes.h:1297
llvm::ISD::BRIND
@ BRIND
BRIND - Indirect branch.
Definition ISDOpcodes.h:1186
llvm::ISD::BR_JT
@ BR_JT
BR_JT - Jumptable branch.
Definition ISDOpcodes.h:1190
llvm::ISD::GC_TRANSITION_START
@ GC_TRANSITION_START
GC_TRANSITION_START/GC_TRANSITION_END - These operators mark the beginning and end of GC transition s...
Definition ISDOpcodes.h:1460
llvm::ISD::VECTOR_INTERLEAVE
@ VECTOR_INTERLEAVE
VECTOR_INTERLEAVE(VEC1, VEC2, ...) - Returns N vectors from N input vectors, where N is the factor to...
Definition ISDOpcodes.h:635
llvm::ISD::STEP_VECTOR
@ STEP_VECTOR
STEP_VECTOR(IMM) - Returns a scalable vector whose lanes are comprised of a linear sequence of unsign...
Definition ISDOpcodes.h:691
llvm::ISD::FCANONICALIZE
@ FCANONICALIZE
Returns platform specific canonical encoding of a floating point number.
Definition ISDOpcodes.h:541
llvm::ISD::IS_FPCLASS
@ IS_FPCLASS
Performs a check of floating point class property, defined by IEEE-754.
Definition ISDOpcodes.h:548
llvm::ISD::SSUBSAT
@ SSUBSAT
RESULT = [US]SUBSAT(LHS, RHS) - Perform saturation subtraction on 2 integers with the same bit width ...
Definition ISDOpcodes.h:374
llvm::ISD::SELECT
@ SELECT
Select(COND, TRUEVAL, FALSEVAL).
Definition ISDOpcodes.h:796
llvm::ISD::ATOMIC_LOAD
@ ATOMIC_LOAD
Val, OUTCHAIN = ATOMIC_LOAD(INCHAIN, ptr) This corresponds to "load atomic" instruction.
Definition ISDOpcodes.h:1371
llvm::ISD::UNDEF
@ UNDEF
UNDEF - An undefined node.
Definition ISDOpcodes.h:233
llvm::ISD::EXTRACT_ELEMENT
@ EXTRACT_ELEMENT
EXTRACT_ELEMENT - This is used to get the lower or upper (determined by a Constant,...
Definition ISDOpcodes.h:247
llvm::ISD::SPLAT_VECTOR
@ SPLAT_VECTOR
SPLAT_VECTOR(VAL) - Returns a vector with the scalar value VAL duplicated in all lanes.
Definition ISDOpcodes.h:672
llvm::ISD::AssertAlign
@ AssertAlign
AssertAlign - These nodes record if a register contains a value that has a known alignment and the tr...
Definition ISDOpcodes.h:69
llvm::ISD::VACOPY
@ VACOPY
VACOPY - VACOPY has 5 operands: an input chain, a destination pointer, a source pointer,...
Definition ISDOpcodes.h:1285
llvm::ISD::GET_ACTIVE_LANE_MASK
@ GET_ACTIVE_LANE_MASK
GET_ACTIVE_LANE_MASK - this corrosponds to the llvm.get.active.lane.mask intrinsic.
Definition ISDOpcodes.h:1591
llvm::ISD::BasicBlock
@ BasicBlock
Various leaf nodes.
Definition ISDOpcodes.h:81
llvm::ISD::CopyFromReg
@ CopyFromReg
CopyFromReg - This node indicates that the input value is a virtual or physical register that is defi...
Definition ISDOpcodes.h:230
llvm::ISD::SADDO
@ SADDO
RESULT, BOOL = [SU]ADDO(LHS, RHS) - Overflow-aware nodes for addition.
Definition ISDOpcodes.h:348
llvm::ISD::TargetGlobalAddress
@ TargetGlobalAddress
TargetGlobalAddress - Like GlobalAddress, but the DAG does no folding or anything else with this node...
Definition ISDOpcodes.h:185
llvm::ISD::CTLS
@ CTLS
Count leading redundant sign bits.
Definition ISDOpcodes.h:792
llvm::ISD::VECREDUCE_ADD
@ VECREDUCE_ADD
Integer reductions may have a result type larger than the vector element type.
Definition ISDOpcodes.h:1513
llvm::ISD::GET_ROUNDING
@ GET_ROUNDING
Returns current rounding mode: -1 Undefined 0 Round to 0 1 Round to nearest, ties to even 2 Round to ...
Definition ISDOpcodes.h:970
llvm::ISD::STRICT_FP_TO_FP16
@ STRICT_FP_TO_FP16
Definition ISDOpcodes.h:1006
llvm::ISD::MULHU
@ MULHU
MULHU/MULHS - Multiply high - Multiply two integers of type iN, producing an unsigned/signed value of...
Definition ISDOpcodes.h:704
llvm::ISD::CLEANUPRET
@ CLEANUPRET
CLEANUPRET - Represents a return from a cleanup block funclet.
Definition ISDOpcodes.h:1251
llvm::ISD::ATOMIC_LOAD_FMAXIMUM
@ ATOMIC_LOAD_FMAXIMUM
Definition ISDOpcodes.h:1412
llvm::ISD::GET_FPMODE
@ GET_FPMODE
Reads the current dynamic floating-point control modes.
Definition ISDOpcodes.h:1150
llvm::ISD::STRICT_FP16_TO_FP
@ STRICT_FP16_TO_FP
Definition ISDOpcodes.h:1005
llvm::ISD::GET_FPENV
@ GET_FPENV
Gets the current floating-point environment.
Definition ISDOpcodes.h:1127
llvm::ISD::SHL
@ SHL
Shift and rotation operations.
Definition ISDOpcodes.h:765
llvm::ISD::AssertNoFPClass
@ AssertNoFPClass
AssertNoFPClass - These nodes record if a register contains a float value that is known to be not som...
Definition ISDOpcodes.h:78
llvm::ISD::VECTOR_SHUFFLE
@ VECTOR_SHUFFLE
VECTOR_SHUFFLE(VEC1, VEC2) - Returns a vector, of the same type as VEC1/VEC2.
Definition ISDOpcodes.h:649
llvm::ISD::PtrAuthGlobalAddress
@ PtrAuthGlobalAddress
A ptrauth constant.
Definition ISDOpcodes.h:100
llvm::ISD::EXTRACT_SUBVECTOR
@ EXTRACT_SUBVECTOR
EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR.
Definition ISDOpcodes.h:614
llvm::ISD::FMINNUM_IEEE
@ FMINNUM_IEEE
FMINNUM_IEEE/FMAXNUM_IEEE - Perform floating-point minimumNumber or maximumNumber on two values,...
Definition ISDOpcodes.h:1099
llvm::ISD::STRICT_FMAXIMUM
@ STRICT_FMAXIMUM
Definition ISDOpcodes.h:470
llvm::ISD::EntryToken
@ EntryToken
EntryToken - This is the marker used to indicate the start of a region.
Definition ISDOpcodes.h:48
llvm::ISD::READ_REGISTER
@ READ_REGISTER
READ_REGISTER, WRITE_REGISTER - This node represents llvm.register on the DAG, which implements the n...
Definition ISDOpcodes.h:139
llvm::ISD::EXTRACT_VECTOR_ELT
@ EXTRACT_VECTOR_ELT
EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR identified by the (potentially...
Definition ISDOpcodes.h:576
llvm::ISD::CopyToReg
@ CopyToReg
CopyToReg - This node has three operands: a chain, a register number to set to this value,...
Definition ISDOpcodes.h:224
llvm::ISD::ZERO_EXTEND
@ ZERO_EXTEND
ZERO_EXTEND - Used for integer types, zeroing the new bits.
Definition ISDOpcodes.h:850
llvm::ISD::TargetConstantFP
@ TargetConstantFP
Definition ISDOpcodes.h:180
llvm::ISD::DEBUGTRAP
@ DEBUGTRAP
DEBUGTRAP - Trap intended to get the attention of a debugger.
Definition ISDOpcodes.h:1345
llvm::ISD::SELECT_CC
@ SELECT_CC
Select with condition operator - This selects between a true value and a false value (ops #2 and #3) ...
Definition ISDOpcodes.h:811
llvm::ISD::VSCALE
@ VSCALE
VSCALE(IMM) - Returns the runtime scaling factor used to calculate the number of elements within a sc...
Definition ISDOpcodes.h:1476
llvm::ISD::ATOMIC_CMP_SWAP
@ ATOMIC_CMP_SWAP
Val, OUTCHAIN = ATOMIC_CMP_SWAP(INCHAIN, ptr, cmp, swap) For double-word atomic operations: ValLo,...
Definition ISDOpcodes.h:1382
llvm::ISD::LOCAL_RECOVER
@ LOCAL_RECOVER
LOCAL_RECOVER - Represents the llvm.localrecover intrinsic.
Definition ISDOpcodes.h:135
llvm::ISD::FMINNUM
@ FMINNUM
FMINNUM/FMAXNUM - Perform floating-point minimum maximum on two values, following IEEE-754 definition...
Definition ISDOpcodes.h:1083
llvm::ISD::UBSANTRAP
@ UBSANTRAP
UBSANTRAP - Trap with an immediate describing the kind of sanitizer failure.
Definition ISDOpcodes.h:1349
llvm::ISD::SSHLSAT
@ SSHLSAT
RESULT = [US]SHLSAT(LHS, RHS) - Perform saturation left shift.
Definition ISDOpcodes.h:386
llvm::ISD::PATCHPOINT
@ PATCHPOINT
The llvm.experimental.patchpoint.
Definition ISDOpcodes.h:1552
llvm::ISD::SMULO
@ SMULO
Same for multiplication.
Definition ISDOpcodes.h:356
llvm::ISD::ATOMIC_LOAD_FMINIMUM
@ ATOMIC_LOAD_FMINIMUM
Definition ISDOpcodes.h:1413
llvm::ISD::DYNAMIC_STACKALLOC
@ DYNAMIC_STACKALLOC
DYNAMIC_STACKALLOC - Allocate some number of bytes on the stack aligned to a specified boundary.
Definition ISDOpcodes.h:1175
llvm::ISD::TargetFrameIndex
@ TargetFrameIndex
Definition ISDOpcodes.h:187
llvm::ISD::VECTOR_SPLICE_LEFT
@ VECTOR_SPLICE_LEFT
VECTOR_SPLICE_LEFT(VEC1, VEC2, OFFSET) - Shifts CONCAT_VECTORS(VEC1, VEC2) left by OFFSET elements an...
Definition ISDOpcodes.h:653
llvm::ISD::ANY_EXTEND_VECTOR_INREG
@ ANY_EXTEND_VECTOR_INREG
ANY_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register any-extension of the low la...
Definition ISDOpcodes.h:899
llvm::ISD::SIGN_EXTEND_INREG
@ SIGN_EXTEND_INREG
SIGN_EXTEND_INREG - This operator atomically performs a SHL/SRA pair to sign extend a small value in ...
Definition ISDOpcodes.h:888
llvm::ISD::SMIN
@ SMIN
[US]{MIN/MAX} - Binary minimum or maximum of signed or unsigned integers.
Definition ISDOpcodes.h:727
llvm::ISD::VECTOR_REVERSE
@ VECTOR_REVERSE
VECTOR_REVERSE(VECTOR) - Returns a vector, of the same type as VECTOR, whose elements are shuffled us...
Definition ISDOpcodes.h:640
llvm::ISD::LIFETIME_START
@ LIFETIME_START
This corresponds to the llvm.lifetime.
Definition ISDOpcodes.h:1442
llvm::ISD::SDIVFIXSAT
@ SDIVFIXSAT
Same as the corresponding unsaturated fixed point instructions, but the result is clamped between the...
Definition ISDOpcodes.h:413
llvm::ISD::FP_EXTEND
@ FP_EXTEND
X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
Definition ISDOpcodes.h:978
llvm::ISD::GLOBAL_OFFSET_TABLE
@ GLOBAL_OFFSET_TABLE
The address of the GOT.
Definition ISDOpcodes.h:103
llvm::ISD::VSELECT
@ VSELECT
Select with a vector condition (op #0) and two vector operands (ops #1 and #2), returning a vector re...
Definition ISDOpcodes.h:805
llvm::ISD::UADDO_CARRY
@ UADDO_CARRY
Carry-using nodes for multiple precision addition and subtraction.
Definition ISDOpcodes.h:328
llvm::ISD::STRICT_SINT_TO_FP
@ STRICT_SINT_TO_FP
STRICT_[US]INT_TO_FP - Convert a signed or unsigned integer to a floating point value.
Definition ISDOpcodes.h:484
llvm::ISD::MGATHER
@ MGATHER
Masked gather and scatter - load and store operations for a vector of random addresses with additiona...
Definition ISDOpcodes.h:1437
llvm::ISD::HANDLENODE
@ HANDLENODE
HANDLENODE node - Used as a handle for various purposes.
Definition ISDOpcodes.h:1325
llvm::ISD::STRICT_BF16_TO_FP
@ STRICT_BF16_TO_FP
Definition ISDOpcodes.h:1014
llvm::ISD::PCMARKER
@ PCMARKER
PCMARKER - This corresponds to the pcmarker intrinsic.
Definition ISDOpcodes.h:1308
llvm::ISD::STRICT_FROUNDEVEN
@ STRICT_FROUNDEVEN
Definition ISDOpcodes.h:464
llvm::ISD::INLINEASM_BR
@ INLINEASM_BR
INLINEASM_BR - Branching version of inline asm. Used by asm-goto.
Definition ISDOpcodes.h:1231
llvm::ISD::EH_DWARF_CFA
@ EH_DWARF_CFA
EH_DWARF_CFA - This node represents the pointer to the DWARF Canonical Frame Address (CFA),...
Definition ISDOpcodes.h:150
llvm::ISD::BF16_TO_FP
@ BF16_TO_FP
BF16_TO_FP, FP_TO_BF16 - These operators are used to perform promotions and truncation for bfloat16.
Definition ISDOpcodes.h:1012
llvm::ISD::FRAMEADDR
@ FRAMEADDR
FRAMEADDR, RETURNADDR - These nodes represent llvm.frameaddress and llvm.returnaddress on the DAG.
Definition ISDOpcodes.h:110
llvm::ISD::ATOMIC_LOAD_UDEC_WRAP
@ ATOMIC_LOAD_UDEC_WRAP
Definition ISDOpcodes.h:1415
llvm::ISD::STRICT_FP_TO_UINT
@ STRICT_FP_TO_UINT
Definition ISDOpcodes.h:478
llvm::ISD::STRICT_FP_ROUND
@ STRICT_FP_ROUND
X = STRICT_FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision ...
Definition ISDOpcodes.h:500
llvm::ISD::STRICT_FP_TO_SINT
@ STRICT_FP_TO_SINT
STRICT_FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
Definition ISDOpcodes.h:477
llvm::ISD::FMINIMUM
@ FMINIMUM
FMINIMUM/FMAXIMUM - NaN-propagating minimum/maximum that also treat -0.0 as less than 0....
Definition ISDOpcodes.h:1105
llvm::ISD::FP_TO_SINT
@ FP_TO_SINT
FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer.
Definition ISDOpcodes.h:926
llvm::ISD::READCYCLECOUNTER
@ READCYCLECOUNTER
READCYCLECOUNTER - This corresponds to the readcyclecounter intrinsic.
Definition ISDOpcodes.h:1316
llvm::ISD::TargetConstant
@ TargetConstant
TargetConstant* - Like Constant*, but the DAG does not do any folding, simplification,...
Definition ISDOpcodes.h:179
llvm::ISD::STRICT_FP_EXTEND
@ STRICT_FP_EXTEND
X = STRICT_FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type.
Definition ISDOpcodes.h:505
llvm::ISD::RELOC_NONE
@ RELOC_NONE
Issue a no-op relocation against a given symbol at the current location.
Definition ISDOpcodes.h:1564
llvm::ISD::AND
@ AND
Bitwise operators - logical and, logical or, logical xor.
Definition ISDOpcodes.h:739
llvm::ISD::TRAP
@ TRAP
TRAP - Trapping instruction.
Definition ISDOpcodes.h:1342
llvm::ISD::INTRINSIC_WO_CHAIN
@ INTRINSIC_WO_CHAIN
RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...) This node represents a target intrinsic fun...
Definition ISDOpcodes.h:205
llvm::ISD::GET_FPENV_MEM
@ GET_FPENV_MEM
Gets the current floating-point environment.
Definition ISDOpcodes.h:1141
llvm::ISD::PSEUDO_PROBE
@ PSEUDO_PROBE
Pseudo probe for AutoFDO, as a place holder in a basic block to improve the sample counts quality.
Definition ISDOpcodes.h:1471
llvm::ISD::STRICT_FP_TO_BF16
@ STRICT_FP_TO_BF16
Definition ISDOpcodes.h:1015
llvm::ISD::SCMP
@ SCMP
[US]CMP - 3-way comparison of signed or unsigned integers.
Definition ISDOpcodes.h:735
llvm::ISD::CARRY_FALSE
@ CARRY_FALSE
CARRY_FALSE - This node is used when folding other nodes, like ADDC/SUBC, which indicate the carry re...
Definition ISDOpcodes.h:285
llvm::ISD::AVGFLOORS
@ AVGFLOORS
AVGFLOORS/AVGFLOORU - Averaging add - Add two integers using an integer of type i[N+1],...
Definition ISDOpcodes.h:710
llvm::ISD::VECTOR_SPLICE_RIGHT
@ VECTOR_SPLICE_RIGHT
VECTOR_SPLICE_RIGHT(VEC1, VEC2, OFFSET) - Shifts CONCAT_VECTORS(VEC1,VEC2) right by OFFSET elements a...
Definition ISDOpcodes.h:657
llvm::ISD::ADDE
@ ADDE
Carry-using nodes for multiple precision addition and subtraction.
Definition ISDOpcodes.h:304
llvm::ISD::STRICT_FADD
@ STRICT_FADD
Constrained versions of the binary floating point operators.
Definition ISDOpcodes.h:427
llvm::ISD::STACKMAP
@ STACKMAP
The llvm.experimental.stackmap intrinsic.
Definition ISDOpcodes.h:1546
llvm::ISD::SPLAT_VECTOR_PARTS
@ SPLAT_VECTOR_PARTS
SPLAT_VECTOR_PARTS(SCALAR1, SCALAR2, ...) - Returns a vector with the scalar values joined together a...
Definition ISDOpcodes.h:681
llvm::ISD::FREEZE
@ FREEZE
FREEZE - FREEZE(VAL) returns an arbitrary value if VAL is UNDEF (or is evaluated to UNDEF),...
Definition ISDOpcodes.h:241
llvm::ISD::INSERT_VECTOR_ELT
@ INSERT_VECTOR_ELT
INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element at IDX replaced with VAL.
Definition ISDOpcodes.h:565
llvm::ISD::TokenFactor
@ TokenFactor
TokenFactor - This node takes multiple tokens as input and produces a single token result.
Definition ISDOpcodes.h:53
llvm::ISD::ATOMIC_SWAP
@ ATOMIC_SWAP
Val, OUTCHAIN = ATOMIC_SWAP(INCHAIN, ptr, amt) Val, OUTCHAIN = ATOMIC_LOAD_[OpName](INCHAIN,...
Definition ISDOpcodes.h:1396
llvm::ISD::ExternalSymbol
@ ExternalSymbol
Definition ISDOpcodes.h:93
llvm::ISD::FFREXP
@ FFREXP
FFREXP - frexp, extract fractional and exponent component of a floating-point value.
Definition ISDOpcodes.h:1049
llvm::ISD::FP_ROUND
@ FP_ROUND
X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision of the ...
Definition ISDOpcodes.h:959
llvm::ISD::VECTOR_COMPRESS
@ VECTOR_COMPRESS
VECTOR_COMPRESS(Vec, Mask, Passthru) consecutively place vector elements based on mask e....
Definition ISDOpcodes.h:699
llvm::ISD::SPONENTRY
@ SPONENTRY
SPONENTRY - Represents the llvm.sponentry intrinsic.
Definition ISDOpcodes.h:122
llvm::ISD::CLEAR_CACHE
@ CLEAR_CACHE
llvm.clear_cache intrinsic Operands: Input Chain, Start Addres, End Address Outputs: Output Chain
Definition ISDOpcodes.h:1615
llvm::ISD::CONVERGENCECTRL_LOOP
@ CONVERGENCECTRL_LOOP
Definition ISDOpcodes.h:1569
llvm::ISD::ZERO_EXTEND_VECTOR_INREG
@ ZERO_EXTEND_VECTOR_INREG
ZERO_EXTEND_VECTOR_INREG(Vector) - This operator represents an in-register zero-extension of the low ...
Definition ISDOpcodes.h:921
llvm::ISD::ADDRSPACECAST
@ ADDRSPACECAST
ADDRSPACECAST - This operator converts between pointers of different address spaces.
Definition ISDOpcodes.h:997
llvm::ISD::EXPERIMENTAL_VECTOR_HISTOGRAM
@ EXPERIMENTAL_VECTOR_HISTOGRAM
Experimental vector histogram intrinsic Operands: Input Chain, Inc, Mask, Base, Index,...
Definition ISDOpcodes.h:1578
llvm::ISD::INLINEASM
@ INLINEASM
INLINEASM - Represents an inline asm block.
Definition ISDOpcodes.h:1228
llvm::ISD::STRICT_FNEARBYINT
@ STRICT_FNEARBYINT
Definition ISDOpcodes.h:458
llvm::ISD::FP_TO_SINT_SAT
@ FP_TO_SINT_SAT
FP_TO_[US]INT_SAT - Convert floating point value in operand 0 to a signed or unsigned scalar integer ...
Definition ISDOpcodes.h:945
llvm::ISD::VECREDUCE_FMINIMUM
@ VECREDUCE_FMINIMUM
Definition ISDOpcodes.h:1509
llvm::ISD::EH_SJLJ_SETJMP
@ EH_SJLJ_SETJMP
RESULT, OUTCHAIN = EH_SJLJ_SETJMP(INCHAIN, buffer) This corresponds to the eh.sjlj....
Definition ISDOpcodes.h:162
llvm::ISD::TRUNCATE
@ TRUNCATE
TRUNCATE - Completely drop the high bits.
Definition ISDOpcodes.h:856
llvm::ISD::VAARG
@ VAARG
VAARG - VAARG has four operands: an input chain, a pointer, a SRCVALUE, and the alignment.
Definition ISDOpcodes.h:1280
llvm::ISD::BRCOND
@ BRCOND
BRCOND - Conditional branch.
Definition ISDOpcodes.h:1204
llvm::ISD::VECREDUCE_SEQ_FMUL
@ VECREDUCE_SEQ_FMUL
Definition ISDOpcodes.h:1487
llvm::ISD::SHL_PARTS
@ SHL_PARTS
SHL_PARTS/SRA_PARTS/SRL_PARTS - These operators are used for expanded integer shift operations.
Definition ISDOpcodes.h:833
llvm::ISD::CATCHRET
@ CATCHRET
CATCHRET - Represents a return from a catch block funclet.
Definition ISDOpcodes.h:1247
llvm::ISD::GC_TRANSITION_END
@ GC_TRANSITION_END
Definition ISDOpcodes.h:1461
llvm::ISD::AssertSext
@ AssertSext
AssertSext, AssertZext - These nodes record if a register contains a value that has already been zero...
Definition ISDOpcodes.h:62
llvm::ISD::ATOMIC_LOAD_UINC_WRAP
@ ATOMIC_LOAD_UINC_WRAP
Definition ISDOpcodes.h:1414
llvm::ISD::FCOPYSIGN
@ FCOPYSIGN
FCOPYSIGN(X, Y) - Return the value of X with the sign of Y.
Definition ISDOpcodes.h:534
llvm::ISD::PARTIAL_REDUCE_SUMLA
@ PARTIAL_REDUCE_SUMLA
Definition ISDOpcodes.h:1540
llvm::ISD::SADDSAT
@ SADDSAT
RESULT = [US]ADDSAT(LHS, RHS) - Perform saturation addition on 2 integers with the same bit width (W)...
Definition ISDOpcodes.h:365
llvm::ISD::CALLSEQ_START
@ CALLSEQ_START
CALLSEQ_START/CALLSEQ_END - These operators mark the beginning and end of a call sequence,...
Definition ISDOpcodes.h:1274
llvm::ISD::VECTOR_DEINTERLEAVE
@ VECTOR_DEINTERLEAVE
VECTOR_DEINTERLEAVE(VEC1, VEC2, ...) - Returns N vectors from N input vectors, where N is the factor ...
Definition ISDOpcodes.h:624
llvm::ISD::GET_DYNAMIC_AREA_OFFSET
@ GET_DYNAMIC_AREA_OFFSET
GET_DYNAMIC_AREA_OFFSET - get offset from native SP to the address of the most recent dynamic alloca.
Definition ISDOpcodes.h:1467
llvm::ISD::SET_FPENV_MEM
@ SET_FPENV_MEM
Sets the current floating point environment.
Definition ISDOpcodes.h:1146
llvm::ISD::FMINIMUMNUM
@ FMINIMUMNUM
FMINIMUMNUM/FMAXIMUMNUM - minimumnum/maximumnum that is same with FMINNUM_IEEE and FMAXNUM_IEEE besid...
Definition ISDOpcodes.h:1110
llvm::ISD::TRUNCATE_SSAT_S
@ TRUNCATE_SSAT_S
TRUNCATE_[SU]SAT_[SU] - Truncate for saturated operand [SU] located in middle, prefix for SAT means i...
Definition ISDOpcodes.h:871
llvm::ISD::ABDS
@ ABDS
ABDS/ABDU - Absolute difference - Return the absolute difference between two numbers interpreted as s...
Definition ISDOpcodes.h:722
llvm::ISD::ADJUST_TRAMPOLINE
@ ADJUST_TRAMPOLINE
ADJUST_TRAMPOLINE - This corresponds to the adjust_trampoline intrinsic.
Definition ISDOpcodes.h:1339
llvm::ISD::TRUNCATE_USAT_U
@ TRUNCATE_USAT_U
Definition ISDOpcodes.h:875
llvm::ISD::SADDO_CARRY
@ SADDO_CARRY
Carry-using overflow-aware nodes for multiple precision addition and subtraction.
Definition ISDOpcodes.h:338
llvm::ISD::INTRINSIC_W_CHAIN
@ INTRINSIC_W_CHAIN
RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...) This node represents a target in...
Definition ISDOpcodes.h:213
llvm::ISD::TargetGlobalTLSAddress
@ TargetGlobalTLSAddress
Definition ISDOpcodes.h:186
llvm::ISD::BUILD_VECTOR
@ BUILD_VECTOR
BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a fixed-width vector with the specified,...
Definition ISDOpcodes.h:556
llvm::ISD::LOOP_DEPENDENCE_WAR_MASK
@ LOOP_DEPENDENCE_WAR_MASK
The llvm.loop.dependence.
Definition ISDOpcodes.h:1609
llvm::ISD::MemIndexedMode
MemIndexedMode
MemIndexedMode enum - This enum defines the load / store indexed addressing modes.
Definition ISDOpcodes.h:1694
llvm::Intrinsic::getBaseName
LLVM_ABI StringRef getBaseName(ID id)
Return the LLVM name for an intrinsic, without encoded types for overloading, such as "llvm....
Definition Intrinsics.cpp:44
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition Types.h:26
llvm::dyn_cast
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:643
llvm::make_range
iterator_range< T > make_range(T x, T y)
Convenience function for iterating over sub-ranges.
Definition iterator_range.h:70
llvm::interleaveComma
void interleaveComma(const Container &c, StreamT &os, UnaryFunctor each_fn)
Definition STLExtras.h:2313
llvm::utostr
std::string utostr(uint64_t X, bool isNeg=false)
Definition StringExtras.h:322
llvm::get
decltype(auto) get(const PointerIntPair< PointerTy, IntBits, IntType, PtrTraits, Info > &Pair)
Definition PointerIntPair.h:268
llvm::dbgs
LLVM_ABI raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition Debug.cpp:207
llvm::isa
bool isa(const From &Val)
isa<X> - Return true if the parameter to the template is an instance of one of the template type argu...
Definition Casting.h:547
llvm::Op
DWARFExpression::Operation Op
Definition DWARFExpressionPrinter.cpp:22
llvm::cast
decltype(auto) cast(const From &Val)
cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:559
llvm::printReg
LLVM_ABI Printable printReg(Register Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)
Prints virtual and physical registers with or without a TRI instance.
Definition TargetRegisterInfo.cpp:110
raw_ostream.h
N
#define N
llvm::EVT::getEVTString
LLVM_ABI std::string getEVTString() const
This function returns value type as a string, e.g. "i32".
Definition ValueTypes.cpp:162
Generated on for LLVM by doxygen 1.14.0