LLVM 24.0.0git
MipsCodeGenPassBuilder.cpp
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1//===----------------------------------------------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#include "Mips.h"
10#include "MipsAsmPrinter.h"
11#include "MipsTargetMachine.h"
19
20using namespace llvm;
21
22namespace {
23
24class MipsCodeGenPassBuilder : public CodeGenPassBuilder {
25 using Base = CodeGenPassBuilder;
26
27 MipsTargetMachine &getTM() const {
28 return static_cast<MipsTargetMachine &>(TM);
29 }
30
31public:
32 explicit MipsCodeGenPassBuilder(MipsTargetMachine &TM,
33 const CGPassBuilderOption &Opts,
34 PassInstrumentationCallbacks *PIC)
35 : CodeGenPassBuilder(TM, Opts, PIC) {}
36
37 void addIRPasses(PassManagerWrapper &PMW) override;
38
39 Error addInstSelector(PassManagerWrapper &PMW) override;
40
41 Error addIRTranslator(PassManagerWrapper &PMW) override;
42 void addPreLegalizeMachineIR(PassManagerWrapper &PMW) override;
43 Error addLegalizeMachineIR(PassManagerWrapper &PMW) override;
44 void addPreRegBankSelect(PassManagerWrapper &PMW) override;
45 Error addRegBankSelect(PassManagerWrapper &PMW) override;
46 Error addGlobalInstructionSelect(PassManagerWrapper &PMW) override;
47
48 void addPreRegAlloc(PassManagerWrapper &PMW) override;
49 void addPreEmitPass(PassManagerWrapper &PMW) override;
50 void addAsmPrinterBegin(PassManagerWrapper &PMW) override;
51 void addAsmPrinter(PassManagerWrapper &PMW) override;
52 void addAsmPrinterEnd(PassManagerWrapper &PMW) override;
53};
54
55} // namespace
56
57void MipsCodeGenPassBuilder::addIRPasses(PassManagerWrapper &PMW) {
58 Base::addIRPasses(PMW);
59 addFunctionPass(AtomicExpandPass(getTM()), PMW);
60 flushFPMsToMPM(PMW);
61 if (getTM().getCLOpts().os16) {
62 addModulePass(MipsOs16Pass(), PMW);
63 }
64 addModulePass(Mips16HardFloatPass(getTM()), PMW);
65}
66
67Error MipsCodeGenPassBuilder::addInstSelector(PassManagerWrapper &PMW) {
68 addMachineFunctionPass(Mips16ISelDAGPass(getTM(), getOptLevel()), PMW);
69 addMachineFunctionPass(MipsSEISelDAGPass(getTM(), getOptLevel()), PMW);
70 return Error::success();
71}
72
73Error MipsCodeGenPassBuilder::addIRTranslator(PassManagerWrapper &PMW) {
74 addMachineFunctionPass(IRTranslatorPass(getOptLevel()), PMW);
75 return Error::success();
76}
77
78void MipsCodeGenPassBuilder::addPreLegalizeMachineIR(PassManagerWrapper &PMW) {
79 addMachineFunctionPass(MipsPreLegalizerCombinerPass(), PMW);
80}
81
82Error MipsCodeGenPassBuilder::addLegalizeMachineIR(PassManagerWrapper &PMW) {
83 addMachineFunctionPass(LegalizerPass(), PMW);
84 return Error::success();
85}
86
87void MipsCodeGenPassBuilder::addPreRegBankSelect(PassManagerWrapper &PMW) {
88 bool IsOptNone = getOptLevel() == CodeGenOptLevel::None;
89 addMachineFunctionPass(MipsPostLegalizerCombinerPass(IsOptNone), PMW);
90}
91
92Error MipsCodeGenPassBuilder::addRegBankSelect(PassManagerWrapper &PMW) {
93 addMachineFunctionPass(RegBankSelectPass(), PMW);
94 return Error::success();
95}
96
97Error MipsCodeGenPassBuilder::addGlobalInstructionSelect(
98 PassManagerWrapper &PMW) {
99 addMachineFunctionPass(InstructionSelectPass(getOptLevel()), PMW);
100 return Error::success();
101}
102
103void MipsCodeGenPassBuilder::addPreRegAlloc(PassManagerWrapper &PMW) {
104 addMachineFunctionPass(MipsOptimizePICCallPass(), PMW);
105}
106
107void MipsCodeGenPassBuilder::addPreEmitPass(PassManagerWrapper &PMW) {
108 // Expand pseudo instructions that are sensitive to register allocation.
109 addMachineFunctionPass(MipsExpandPseudoPass(), PMW);
110
111 // The microMIPS size reduction pass performs instruction reselection for
112 // instructions which can be remapped to a 16 bit instruction.
113 addMachineFunctionPass(MicroMipsSizeReducePass(), PMW);
114
115 // This pass inserts a nop instruction between two back-to-back multiplication
116 // instructions when the "mfix4300" flag is passed.
117 if (getTM().getCLOpts().mfix4300)
118 addMachineFunctionPass(MipsMulMulBugFixPass(), PMW);
119
120 // The delay slot filler pass can potientially create forbidden slot hazards
121 // for MIPSR6 and therefore it should go before MipsBranchExpansion pass.
122 addMachineFunctionPass(MipsDelaySlotFillerPass(), PMW);
123
124 // This pass expands branches and takes care about the forbidden slot hazards.
125 // Expanding branches may potentially create forbidden slot hazards for
126 // MIPSR6, and fixing such hazard may potentially break a branch by extending
127 // its offset out of range. That's why this pass combine these two tasks, and
128 // runs them alternately until one of them finishes without any changes. Only
129 // then we can be sure that all branches are expanded properly and no hazards
130 // exists.
131 // Any new pass should go before this pass.
132 addMachineFunctionPass(MipsBranchExpansionPass(), PMW);
133
134 addMachineFunctionPass(MipsConstantIslandPass(), PMW);
135}
136
137void MipsCodeGenPassBuilder::addAsmPrinterBegin(PassManagerWrapper &PMW) {
138 addModulePass(MipsAsmPrinterBeginPass(), PMW, /*Force=*/true);
139}
140
141void MipsCodeGenPassBuilder::addAsmPrinter(PassManagerWrapper &PMW) {
142 addMachineFunctionPass(MipsAsmPrinterPass(), PMW);
143}
144
145void MipsCodeGenPassBuilder::addAsmPrinterEnd(PassManagerWrapper &PMW) {
146 addModulePass(MipsAsmPrinterEndPass(), PMW, /*Force=*/true);
147}
148
150#define GET_PASS_REGISTRY "MipsPassRegistry.def"
152}
153
156 raw_pwrite_stream *DwoOut, CodeGenFileType FileType,
157 const CGPassBuilderOption &Opt, MCContext &Ctx,
159 auto CGPB = MipsCodeGenPassBuilder(*this, Opt, PIC);
160 return CGPB.buildPipeline(MPM, MAM, Out, DwoOut, FileType, Ctx);
161}
Interfaces for producing common pass manager configurations.
This file declares the IRTranslator pass.
ModuleAnalysisManager MAM
PassBuilder PB(Mod->getContext(), Machine, PassOpts->PTO, std::nullopt, &PIC)
PassInstrumentationCallbacks PIC
This file describes the interface of the MachineFunctionPass responsible for assigning the generic vi...
const GCNTargetMachine & getTM(const GCNSubtarget *STI)
This class provides access to building LLVM's passes.
Lightweight error class with error context and mandatory checking.
Definition Error.h:159
static ErrorSuccess success()
Create a success value.
Definition Error.h:336
Context object for machine code objects.
Definition MCContext.h:83
void registerPassBuilderCallbacks(PassBuilder &PB) override
Allow the target to modify the pass pipeline.
Error buildCodeGenPipeline(ModulePassManager &MPM, ModuleAnalysisManager &MAM, raw_pwrite_stream &Out, raw_pwrite_stream *DwoOut, CodeGenFileType FileType, const CGPassBuilderOption &Opt, MCContext &Ctx, PassInstrumentationCallbacks *PIC) override
This class provides access to building LLVM's passes.
This class manages callbacks registration, as well as provides a way for PassInstrumentation to pass ...
An abstract base class for streams implementations that also support a pwrite operation.
Interfaces for registering analysis passes, producing common pass manager configurations,...
const AArch64MCOptions & getCLOpts(const MCTargetOptions &Options)
This is an optimization pass for GlobalISel generic memory operations.
CodeGenFileType
These enums are meant to be passed into addPassesToEmitFile to indicate what type of file to emit,...
Definition CodeGen.h:309
PassManager< Module > ModulePassManager
Convenience typedef for a pass manager over modules.
AnalysisManager< Module > ModuleAnalysisManager
Convenience typedef for the Module analysis manager.
Definition MIRParser.h:39