43#define GEN_HAS_MEMBER(member) \
44 class HasMember##member { \
45 template <typename U> \
46 using check_member = decltype(std::declval<U>().member); \
49 static constexpr bool RESULT = \
50 llvm::is_detected<check_member, AMDGPUMCKernelCodeT>::value; \
52 class IsMCExpr##member { \
53 template <typename U> \
54 static constexpr auto HasMCExprType(int) -> std::bool_constant< \
55 HasMember##member::RESULT && \
56 std::is_same_v<decltype(U::member), const MCExpr *>>; \
57 template <typename U> static constexpr std::false_type HasMCExprType(...); \
60 static constexpr bool RESULT = \
61 decltype(HasMCExprType<AMDGPUMCKernelCodeT>(0))::value; \
63 class GetMember##member { \
65 static const MCExpr *Phony; \
66 template <typename U> static const MCExpr *&Get(U &C) { \
67 if constexpr (IsMCExpr##member::RESULT) \
73 const MCExpr *GetMember##member::Phony = nullptr;
154#define RECORD(name, altName, print, parse) #name
164#define RECORD(name, altName, print, parse) #altName
172 static bool const Table[] = {
173#define RECORD(name, altName, print, parse) (IsMCExpr##name::RESULT)
184#define RECORD(name, altName, print, parse) GetMember##name::Get
195 for (
unsigned i = 0; i < names.
size(); ++i) {
196 map.
insert(std::pair(names[i], i));
197 map.
insert(std::pair(altNames[i], i));
203 static const auto map =
createIndexMap(get_amd_kernel_code_t_FldNames(),
204 get_amd_kernel_code_t_FldAltNames());
205 return map.lookup(
name) - 1;
210 template <
typename T, T AMDGPUMCKernelCodeT::*ptr>
214 if constexpr (!std::is_integral_v<T>) {
217 Helper(
Value, OS, Ctx.getAsmInfo());
219 OS << Name <<
" = " << (int)(
C.*ptr);
224template <
typename T, T AMDGPUMCKernelCodeT::*ptr,
int shift,
int w
idth = 1>
228 const auto Mask = (
static_cast<T>(1) << width) - 1;
229 OS << Name <<
" = " << (int)((
C.*ptr >> shift) & Mask);
237 static const PrintFx Table[] = {
238#define COMPPGM1(name, aname, AccMacro) \
239 COMPPGM(name, aname, C_00B848_##AccMacro, S_00B848_##AccMacro, 0)
240#define COMPPGM2(name, aname, AccMacro) \
241 COMPPGM(name, aname, C_00B84C_##AccMacro, S_00B84C_##AccMacro, 32)
242#define PRINTFIELD(sname, aname, name) PrintField::printField<FLD_T(name)>
243#define PRINTCOMP(Complement, PGMType) \
244 [](StringRef Name, const AMDGPUMCKernelCodeT &C, raw_ostream &OS, \
245 MCContext &Ctx, AMDGPUMCKernelCodeT::PrintHelper Helper) { \
246 OS << Name << " = "; \
247 auto [Shift, Mask] = getShiftMask(Complement); \
248 const MCExpr *Value; \
249 if (PGMType == 0) { \
251 maskShiftGet(C.compute_pgm_resource1_registers, Mask, Shift, Ctx); \
254 maskShiftGet(C.compute_pgm_resource2_registers, Mask, Shift, Ctx); \
256 Helper(Value, OS, Ctx.getAsmInfo()); \
258#define RECORD(name, altName, print, parse) print
269 Err <<
"expected '='";
275 Err <<
"integer absolute expression expected";
281template <
typename T, T AMDGPUMCKernelCodeT::*ptr>
291template <
typename T, T AMDGPUMCKernelCodeT::*ptr,
int shift,
int w
idth = 1>
297 const uint64_t Mask = ((UINT64_C(1) << width) - 1) << shift;
299 C.*ptr |= (
T)((
Value << shift) & Mask);
306 Err <<
"expected '='";
312 Err <<
"Could not parse expression";
321 static const ParseFx Table[] = {
322#define COMPPGM1(name, aname, AccMacro) \
323 COMPPGM(name, aname, G_00B848_##AccMacro, C_00B848_##AccMacro, 0)
324#define COMPPGM2(name, aname, AccMacro) \
325 COMPPGM(name, aname, G_00B84C_##AccMacro, C_00B84C_##AccMacro, 32)
326#define PARSECOMP(Complement, PGMType) \
327 [](AMDGPUMCKernelCodeT &C, MCAsmParser &MCParser, \
328 raw_ostream &Err) -> bool { \
329 MCContext &Ctx = MCParser.getContext(); \
330 const MCExpr *Value; \
331 if (!parseExpr(MCParser, Value, Err)) \
333 auto [Shift, Mask] = getShiftMask(Complement); \
334 Value = maskShiftSet(Value, Mask, Shift, Ctx); \
335 const MCExpr *Compl = MCConstantExpr::create(Complement, Ctx); \
336 if (PGMType == 0) { \
337 C.compute_pgm_resource1_registers = MCBinaryExpr::createAnd( \
338 C.compute_pgm_resource1_registers, Compl, Ctx); \
339 C.compute_pgm_resource1_registers = MCBinaryExpr::createOr( \
340 C.compute_pgm_resource1_registers, Value, Ctx); \
342 C.compute_pgm_resource2_registers = MCBinaryExpr::createAnd( \
343 C.compute_pgm_resource2_registers, Compl, Ctx); \
344 C.compute_pgm_resource2_registers = MCBinaryExpr::createOr( \
345 C.compute_pgm_resource2_registers, Value, Ctx); \
349#define RECORD(name, altName, print, parse) parse
359 auto Printer = getPrinterTable(Helper)[FldIndex];
361 Printer(get_amd_kernel_code_t_FldNames()[FldIndex + 1],
C, OS, Ctx, Helper);
389 !STI->
hasFeature(AMDGPU::FeatureDX10ClampAndIEEEMode)) {
390 Ctx.reportError({},
"enable_dx10_clamp=1 is not allowed on GFX1170+");
395 !STI->
hasFeature(AMDGPU::FeatureDX10ClampAndIEEEMode)) {
396 Ctx.reportError({},
"enable_ieee_mode=1 is not allowed on GFX1170+");
401 Ctx.reportError({},
"enable_wgp_mode=1 is only allowed on GFX10+");
406 Ctx.reportError({},
"enable_mem_ordered=1 is only allowed on GFX10+");
411 Ctx.reportError({},
"enable_fwd_progress=1 is only allowed on GFX10+");
417 static const auto IndexTable = getMCExprIndexTable();
418 return IndexTable[Index](*this);
425 Err <<
"unexpected amd_kernel_code_t field name " <<
ID;
429 if (hasMCExprVersionTable()[Idx]) {
436 auto Parser = getParserTable()[Idx];
437 return Parser && Parser(*
this, MCParser, Err);
442 const int Size = hasMCExprVersionTable().size();
443 for (
int i = 0; i <
Size; ++i) {
445 if (hasMCExprVersionTable()[i]) {
446 OS << get_amd_kernel_code_t_FldNames()[i + 1] <<
" = ";
448 Helper(
Value, OS, Ctx.getAsmInfo());
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
Provides AMDGPU specific target descriptions.
static void printBitField(StringRef Name, const AMDGPUMCKernelCodeT &C, raw_ostream &OS, MCContext &, AMDGPUMCKernelCodeT::PrintHelper)
static bool expectAbsExpression(MCAsmParser &MCParser, int64_t &Value, raw_ostream &Err)
static bool parseExpr(MCAsmParser &MCParser, const MCExpr *&Value, raw_ostream &Err)
static bool parseField(AMDGPUMCKernelCodeT &C, MCAsmParser &MCParser, raw_ostream &Err)
const MCExpr *&(*)(AMDGPUMCKernelCodeT &) RetrieveFx
void(*)(StringRef, const AMDGPUMCKernelCodeT &, raw_ostream &, MCContext &, AMDGPUMCKernelCodeT::PrintHelper Helper) PrintFx
bool(*)(AMDGPUMCKernelCodeT &, MCAsmParser &, raw_ostream &) ParseFx
#define GEN_HAS_MEMBER(member)
static bool parseBitField(AMDGPUMCKernelCodeT &C, MCAsmParser &MCParser, raw_ostream &Err)
static void printAmdKernelCodeField(const AMDGPUMCKernelCodeT &C, int FldIndex, raw_ostream &OS, MCContext &Ctx, AMDGPUMCKernelCodeT::PrintHelper Helper)
static StringMap< int > createIndexMap(ArrayRef< StringLiteral > names, ArrayRef< StringLiteral > altNames)
static int get_amd_kernel_code_t_FieldIndex(StringRef name)
MC layer struct for AMDGPUMCKernelCodeT, provides MCExpr functionality where required.
@ AMD_CODE_PROPERTY_IS_DYNAMIC_CALLSTACK_SHIFT
Indicate if the generated ISA is using a dynamically sized call stack.
@ AMD_CODE_PROPERTY_IS_DYNAMIC_CALLSTACK_WIDTH
dxil pretty DXIL Metadata Pretty Printer
#define G_00B848_FWD_PROGRESS(x)
#define G_00B848_MEM_ORDERED(x)
#define G_00B848_IEEE_MODE(x)
#define G_00B848_DX10_CLAMP(x)
#define G_00B848_WGP_MODE(x)
static void printField(StringRef Name, const AMDGPUMCKernelCodeT &C, raw_ostream &OS, MCContext &Ctx, AMDGPUMCKernelCodeT::PrintHelper Helper)
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
size_t size() const
size - Get the array size.
const AsmToken & Lex()
Consume the next token from the input stream and return it.
bool isNot(AsmToken::TokenKind K) const
Check if the current token has kind K.
Generic assembler parser interface, for use by target specific assembly parsers.
virtual bool parseExpression(const MCExpr *&Res, SMLoc &EndLoc)=0
Parse an arbitrary expression.
virtual bool parseAbsoluteExpression(int64_t &Res)=0
Parse an expression which must evaluate to an absolute value.
static const MCBinaryExpr * createOr(const MCExpr *LHS, const MCExpr *RHS, MCContext &Ctx)
static LLVM_ABI const MCConstantExpr * create(int64_t Value, MCContext &Ctx, bool PrintInHex=false, unsigned SizeInBytes=0)
Context object for machine code objects.
Base class for the full range of assembler expressions which are needed for parsing.
Streaming machine code generation interface.
void emitValue(const MCExpr *Value, unsigned Size, SMLoc Loc=SMLoc())
virtual void emitIntValue(uint64_t Value, unsigned Size)
Special case of EmitValue that avoids the client having to pass in a MCExpr for constant integers.
virtual void emitBytes(StringRef Data)
Emit the bytes in Data into the output.
Generic base class for all target subtargets.
bool hasFeature(unsigned Feature) const
A wrapper around a string literal that serves as a proxy for constructing global tables of StringRefs...
StringMap - This is an unconventional map that is specialized for handling keys that are "strings",...
bool insert(MapEntryTy *KeyValue)
insert - Insert the specified key/value pair into the map.
StringRef - Represent a constant reference to a string, i.e.
LLVM Value Representation.
This class implements an extremely fast bulk output stream that can only output to a stream.
const MCExpr * maskShiftSet(const MCExpr *Val, uint32_t Mask, uint32_t Shift, MCContext &Ctx)
Provided with the MCExpr * Val, uint32 Mask and Shift, will return the masked and left shifted,...
bool isGFX10Plus(const MCSubtargetInfo &STI)
void initDefaultAMDKernelCodeT(AMDGPUMCKernelCodeT &KernelCode, const MCSubtargetInfo *STI)
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
@ C
The default llvm calling convention, compatible with C.
This is an optimization pass for GlobalISel generic memory operations.
constexpr uint32_t Hi_32(uint64_t Value)
Return the high 32 bits of a 64 bit value.
constexpr uint32_t Lo_32(uint64_t Value)
Return the low 32 bits of a 64 bit value.
ArrayRef(const T &OneElt) -> ArrayRef< T >
uint16_t reserved_vgpr_first
uint16_t reserved_vgpr_count
uint16_t amd_machine_version_major
uint16_t amd_machine_kind
uint64_t kernarg_segment_byte_size
uint16_t amd_machine_version_stepping
uint8_t private_segment_alignment
uint16_t debug_wavefront_private_segment_offset_sgpr
int64_t kernel_code_entry_byte_offset
uint64_t control_directives[16]
const MCExpr * workitem_private_segment_byte_size
uint16_t debug_private_segment_buffer_sgpr
uint32_t amd_kernel_code_version_major
function_ref< void(const MCExpr *, raw_ostream &, const MCAsmInfo *)> PrintHelper
void EmitKernelCodeT(raw_ostream &OS, MCContext &Ctx, PrintHelper Helper)
const MCExpr * compute_pgm_resource2_registers
uint16_t amd_machine_version_minor
uint32_t gds_segment_byte_size
uint8_t group_segment_alignment
uint32_t workgroup_fbarrier_count
uint8_t kernarg_segment_alignment
uint16_t reserved_sgpr_first
void validate(const MCSubtargetInfo *STI, MCContext &Ctx)
AMDGPUMCKernelCodeT()=default
uint32_t amd_kernel_code_version_minor
const MCExpr * wavefront_sgpr_count
void initDefault(const MCSubtargetInfo *STI, MCContext &Ctx, bool InitMCExpr=true)
uint16_t reserved_sgpr_count
uint64_t kernel_code_prefetch_byte_size
const MCExpr * workitem_vgpr_count
const MCExpr * is_dynamic_callstack
int64_t kernel_code_prefetch_byte_offset
uint32_t workgroup_group_segment_byte_size
bool ParseKernelCodeT(StringRef ID, MCAsmParser &MCParser, raw_ostream &Err)
uint64_t runtime_loader_kernel_symbol
const MCExpr *& getMCExprForIndex(int Index)
const MCExpr * compute_pgm_resource1_registers
uint64_t compute_pgm_resource_registers