LLVM 23.0.0git
AArch64MCLFIRewriter.h
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1//===- AArch64MCLFIRewriter.h -----------------------------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file declares the AArch64MCLFIRewriter class, the AArch64 specific
10// subclass of MCLFIRewriter.
11//
12//===----------------------------------------------------------------------===//
13#ifndef LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64MCLFIREWRITER_H
14#define LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64MCLFIREWRITER_H
15
16#include "llvm/MC/MCInstrInfo.h"
18#include "llvm/MC/MCRegister.h"
20
21namespace llvm {
22class MCContext;
23class MCExpr;
24class MCInst;
25class MCStreamer;
26class MCSubtargetInfo;
27
28/// Rewrites AArch64 instructions for LFI sandboxing.
29///
30/// This class implements the LFI (Lightweight Fault Isolation) rewriting
31/// for AArch64 instructions. It transforms instructions to ensure memory
32/// accesses and control flow are confined within the sandbox region.
33///
34/// Reserved registers:
35/// - X27: Sandbox base address (always holds the base)
36/// - X28: Safe address register (always within sandbox)
37/// - X26: Scratch register for intermediate calculations
38/// - X25: context register (points to thread-local runtime data)
39/// - SP: Stack pointer (always within sandbox)
40/// - X30: Link register (always within sandbox)
42public:
43 AArch64MCLFIRewriter(MCContext &Ctx, std::unique_ptr<MCRegisterInfo> &&RI,
44 std::unique_ptr<MCInstrInfo> &&II)
45 : MCLFIRewriter(Ctx, std::move(RI), std::move(II)) {}
46
47 bool rewriteInst(const MCInst &Inst, MCStreamer &Out,
48 const MCSubtargetInfo &STI) override;
49
50private:
51 /// Recursion guard to prevent infinite loops when emitting instructions.
52 bool Guard = false;
53
54 /// Deferred `.tlsdesccall` symbol. The directive attaches a
55 /// R_AARCH64_TLSDESC_CALL relocation to the following BLR. Since LFI inserts
56 /// a guard before that BLR, the marker is deferred and re-emitted between
57 /// the guard and the branch so the relocation stays on the BLR.
58 const MCExpr *PendingTLSDescCall = nullptr;
59
60 // Instruction classification. Returns the reserved register that may be
61 // modified, or an invalid register if no reserved register is touched.
62 MCRegister mayModifyReserved(const MCInst &Inst) const;
63
64 // Instruction emission.
65 void emitInst(const MCInst &Inst, MCStreamer &Out,
66 const MCSubtargetInfo &STI);
67 void emitAddMask(MCRegister Dest, MCRegister Src, MCStreamer &Out,
68 const MCSubtargetInfo &STI);
69 void emitBranch(unsigned Opcode, MCRegister Target, MCStreamer &Out,
70 const MCSubtargetInfo &STI);
71 void emitPendingTLSDescCall(MCStreamer &Out, const MCSubtargetInfo &STI);
72 void emitMov(MCRegister Dest, MCRegister Src, MCStreamer &Out,
73 const MCSubtargetInfo &STI);
74
75 // Rewriting logic.
76 void doRewriteInst(const MCInst &Inst, MCStreamer &Out,
77 const MCSubtargetInfo &STI);
78
79 // Control flow.
80 void rewriteIndirectBranch(const MCInst &Inst, MCStreamer &Out,
81 const MCSubtargetInfo &STI);
82 void rewriteReturn(const MCInst &Inst, MCStreamer &Out,
83 const MCSubtargetInfo &STI);
84
85 // Link register modification.
86 void rewriteLRModification(const MCInst &Inst, MCStreamer &Out,
87 const MCSubtargetInfo &STI);
88
89 // System instructions.
90 void rewriteSyscall(const MCInst &Inst, MCStreamer &Out,
91 const MCSubtargetInfo &STI);
92 void rewriteTPRead(const MCInst &Inst, MCStreamer &Out,
93 const MCSubtargetInfo &STI);
94 void rewriteTPWrite(const MCInst &Inst, MCStreamer &Out,
95 const MCSubtargetInfo &STI);
96};
97
98} // namespace llvm
99
100#endif // LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64MCLFIREWRITER_H
This file declares the MCLFIRewriter class, an abstract class that encapsulates the rewriting logic f...
uint64_t IntrinsicInst * II
AArch64MCLFIRewriter(MCContext &Ctx, std::unique_ptr< MCRegisterInfo > &&RI, std::unique_ptr< MCInstrInfo > &&II)
bool rewriteInst(const MCInst &Inst, MCStreamer &Out, const MCSubtargetInfo &STI) override
Context object for machine code objects.
Definition MCContext.h:83
Base class for the full range of assembler expressions which are needed for parsing.
Definition MCExpr.h:34
Instances of this class represent a single low-level machine instruction.
Definition MCInst.h:188
MCLFIRewriter(MCContext &Ctx, std::unique_ptr< MCRegisterInfo > &&RI, std::unique_ptr< MCInstrInfo > &&II)
Wrapper class representing physical registers. Should be passed by value.
Definition MCRegister.h:41
Streaming machine code generation interface.
Definition MCStreamer.h:222
Generic base class for all target subtargets.
Target - Wrapper for Target specific information.
This is an optimization pass for GlobalISel generic memory operations.
OutputIt move(R &&Range, OutputIt Out)
Provide wrappers to std::move which take ranges instead of having to pass begin/end explicitly.
Definition STLExtras.h:1916
Implement std::hash so that hash_code can be used in STL containers.
Definition BitVector.h:861