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LLVM 23.0.0git
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#include "AArch64Disassembler.h"#include "AArch64ExternalSymbolizer.h"#include "MCTargetDesc/AArch64AddressingModes.h"#include "MCTargetDesc/AArch64MCTargetDesc.h"#include "TargetInfo/AArch64TargetInfo.h"#include "Utils/AArch64BaseInfo.h"#include "llvm/MC/MCDecoder.h"#include "llvm/MC/MCDecoderOps.h"#include "llvm/MC/MCDisassembler/MCRelocationInfo.h"#include "llvm/MC/MCInst.h"#include "llvm/MC/MCInstrDesc.h"#include "llvm/MC/MCRegisterInfo.h"#include "llvm/MC/MCSubtargetInfo.h"#include "llvm/MC/TargetRegistry.h"#include "llvm/Support/Compiler.h"#include "llvm/Support/Debug.h"#include <memory>#include "AArch64GenDisassemblerTables.inc"#include "AArch64GenInstrInfo.inc"Go to the source code of this file.
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| #define | DEBUG_TYPE "aarch64-disassembler" |
| #define | Success MCDisassembler::Success |
| #define | Fail MCDisassembler::Fail |
| #define | SoftFail MCDisassembler::SoftFail |
Typedefs | |
| using | DecodeStatus = MCDisassembler::DecodeStatus |
| #define DEBUG_TYPE "aarch64-disassembler" |
Definition at line 33 of file AArch64Disassembler.cpp.
| #define Fail MCDisassembler::Fail |
Definition at line 46 of file AArch64Disassembler.cpp.
Referenced by checkedGetHex(), DecodeAddSubERegInstruction(), DecodeAddSubImmShift(), DecodeAdrInstruction(), DecodeAuthLoadInstruction(), DecodeExclusiveLdStInstruction(), DecodeGPR64x8ClassRegisterClass(), DecodeGPRSeqPairsClassRegisterClass(), DecodeImm8OptLsl(), DecodeLogicalImmInstruction(), DecodeMatrixTileListRegisterClass(), DecodeMoveImmInstruction(), DecodePairLdStInstruction(), DecodePCRelLabel16(), DecodePPR2Mul2RegisterClass(), DecodePRFMRegInstruction(), DecodeSignedLdStInstruction(), DecodeSImm(), DecodeSimpleRegisterClass(), DecodeSVCROp(), DecodeSVELogicalImmInstruction(), DecodeSyspXzrInstruction(), DecodeSystemPStateImm0_15Instruction(), DecodeSystemPStateImm0_1Instruction(), DecodeThreeAddrSRegInstruction(), DecodeUImm(), DecodeUnsignedLdStInstruction(), DecodeZK(), DecodeZPR2Mul2RegisterClass(), DecodeZPR4Mul4RegisterClass(), DecodeZPRMul2_MinMax(), llvm::object::MachOObjectFile::getChainedFixupsSegments(), parseThunkName(), NodeArray::printAsString(), llvm::orc::detail::WaitingOnGraphOpReplay< ContainerIdT, ElementIdT >::Replayer::replay(), llvm::sys::RetryAfterSignal(), safeToMergeTerminators(), and llvm::BTFParser::symbolize().
| #define SoftFail MCDisassembler::SoftFail |
Definition at line 47 of file AArch64Disassembler.cpp.
Referenced by DecodeAuthLoadInstruction(), DecodeExclusiveLdStInstruction(), DecodePairLdStInstruction(), and DecodeSignedLdStInstruction().
| #define Success MCDisassembler::Success |
Definition at line 45 of file AArch64Disassembler.cpp.
Referenced by canRenameUntilSecondLoad(), collectMetadataInfo(), combineIRFlags(), computeLabelDiff(), createCmpXchgInstFun(), DecodeAddSubERegInstruction(), DecodeAddSubImmShift(), DecodeAdrInstruction(), DecodeAuthLoadInstruction(), DecodeExclusiveLdStInstruction(), DecodeFixedPointScaleImm32(), DecodeFixedPointScaleImm64(), DecodeFMOVLaneInstruction(), DecodeGPR64x8ClassRegisterClass(), DecodeGPRSeqPairsClassRegisterClass(), DecodeImm8OptLsl(), DecodeLogicalImmInstruction(), DecodeMatrixTileListRegisterClass(), DecodeMemExtend(), DecodeModImmInstruction(), DecodeModImmTiedInstruction(), DecodeMoveImmInstruction(), DecodeMPR128RegisterClass(), DecodeMPR16RegisterClass(), DecodeMPR32RegisterClass(), DecodeMPR64RegisterClass(), DecodeMPR8RegisterClass(), DecodeMPRRegisterClass(), DecodeMRSSystemRegister(), DecodeMSRSystemRegister(), DecodePairLdStInstruction(), DecodePCRelLabel16(), DecodePCRelLabel19(), DecodePCRelLabel9(), DecodePPR2Mul2RegisterClass(), DecodePRFMRegInstruction(), DecodeSignedLdStInstruction(), DecodeSImm(), DecodeSimpleRegisterClass(), DecodeSMESpillFillInstruction(), DecodeSVCROp(), DecodeSVEIncDecImm(), DecodeSVELogicalImmInstruction(), DecodeSyspXzrInstruction(), DecodeSystemPStateImm0_15Instruction(), DecodeSystemPStateImm0_1Instruction(), DecodeTestAndBranch(), DecodeThreeAddrSRegInstruction(), DecodeUImm(), DecodeUnconditionalBranch(), DecodeUnsignedLdStInstruction(), DecodeVecShiftLImm(), DecodeVecShiftRImm(), DecodeZeroImm(), DecodeZK(), DecodeZPR2Mul2RegisterClass(), DecodeZPR4Mul4RegisterClass(), DecodeZPRMul2_MinMax(), DecodeZTRRegisterClass(), emitLoad(), emitStore(), getCompoundInsn(), LowerCMP_SWAP(), mergeCompatibleInvokesImpl(), and sinkLastInstruction().
Definition at line 36 of file AArch64Disassembler.cpp.
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Definition at line 1634 of file AArch64Disassembler.cpp.
References T.
Referenced by LLVMInitializeAArch64Disassembler().
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Definition at line 1678 of file AArch64Disassembler.cpp.
Referenced by LLVMInitializeAArch64Disassembler().
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Definition at line 1053 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), llvm::MCInst::getOpcode(), and Success.
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Definition at line 1241 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
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Definition at line 1226 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), llvm::SignExtend64(), Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
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Definition at line 1018 of file AArch64Disassembler.cpp.
References DecodeSImm(), DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), llvm::MCInst::getOpcode(), SoftFail, and Success.
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Definition at line 1488 of file AArch64Disassembler.cpp.
References DecodeSimpleRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCD::fieldFromInstruction(), and llvm::MCDisassembler::Success.
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Definition at line 760 of file AArch64Disassembler.cpp.
References DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), llvm::MCInst::getOpcode(), SoftFail, and Success.
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Definition at line 201 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and Success.
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Definition at line 210 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and Success.
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Definition at line 279 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), llvm::MCD::fieldFromInstruction(), and Success.
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Definition at line 63 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 1364 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, Reg, and Success.
Referenced by DecodeWSeqPairsClassRegisterClass(), and DecodeXSeqPairsClassRegisterClass().
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Definition at line 1460 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Fail, and Success.
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Definition at line 1128 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), llvm::MCInst::getOpcode(), llvm::AArch64_AM::isValidDecodeLogicalImmediate(), and Success.
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Definition at line 127 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Fail, and Success.
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Definition at line 253 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and Success.
Referenced by DecodePRFMRegInstruction().
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Definition at line 1165 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), llvm::MCD::fieldFromInstruction(), llvm::MCInst::getOpcode(), and Success.
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Definition at line 1206 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), llvm::MCD::fieldFromInstruction(), and Success.
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Definition at line 452 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), llvm::MCInst::getOpcode(), llvm::MCInst::getOperand(), Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
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Definition at line 181 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Reg, and Success.
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Definition at line 154 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Reg, and Success.
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Definition at line 163 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Reg, and Success.
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Definition at line 172 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Reg, and Success.
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Definition at line 148 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), and Success.
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Definition at line 142 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), and Success.
Referenced by DecodeSMESpillFillInstruction().
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Definition at line 261 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and Success.
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Definition at line 271 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and Success.
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Definition at line 853 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), llvm::MCInst::getOpcode(), llvm::SignExtend64(), SoftFail, and Success.
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Definition at line 217 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Fail, Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
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Definition at line 232 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCInst::getOpcode(), llvm::SignExtend64(), Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
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Definition at line 243 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::SignExtend64(), Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
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Definition at line 190 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 1574 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeMemExtend(), DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), llvm::MCInst::getOpcode(), and Success.
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Definition at line 1548 of file AArch64Disassembler.cpp.
References DecodeSimpleRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCD::fieldFromInstruction(), and llvm::MCDisassembler::Success.
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Definition at line 1519 of file AArch64Disassembler.cpp.
References DecodeSimpleRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCD::fieldFromInstruction(), and llvm::MCDisassembler::Success.
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Definition at line 557 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), llvm::MCInst::getOpcode(), llvm::SignExtend64(), SoftFail, and Success.
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Definition at line 1435 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Fail, and Success.
Referenced by DecodeAuthLoadInstruction().
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Definition at line 50 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
Referenced by DecodeAddSubERegInstruction(), DecodeAddSubImmShift(), DecodeAdrInstruction(), DecodeAuthLoadInstruction(), DecodeCPYMemOpInstruction(), DecodeExclusiveLdStInstruction(), DecodeFMOVLaneInstruction(), DecodeLogicalImmInstruction(), DecodeModImmInstruction(), DecodeModImmTiedInstruction(), DecodeMoveImmInstruction(), DecodePairLdStInstruction(), DecodePRFMRegInstruction(), DecodeSETMemGoOpInstruction(), DecodeSETMemOpInstruction(), DecodeSignedLdStInstruction(), DecodeSMESpillFillInstruction(), DecodeSVELogicalImmInstruction(), DecodeSyspXzrInstruction(), DecodeTestAndBranch(), DecodeThreeAddrSRegInstruction(), and DecodeUnsignedLdStInstruction().
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Definition at line 1612 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeMPRRegisterClass(), DecodeSimpleRegisterClass(), llvm::MCD::fieldFromInstruction(), and Success.
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Definition at line 1479 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Fail, and Success.
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Definition at line 1472 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and Success.
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Definition at line 1412 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), llvm::MCInst::getOpcode(), llvm::AArch64_AM::isValidDecodeLogicalImmediate(), and Success.
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Definition at line 1390 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), and Success.
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Definition at line 1300 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Fail, llvm::MCD::fieldFromInstruction(), llvm::MCSubtargetInfo::getFeatureBits(), llvm::MCDisassembler::getSubtargetInfo(), isInvalidPState(), and Success.
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Definition at line 1321 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Fail, llvm::MCD::fieldFromInstruction(), llvm::MCSubtargetInfo::getFeatureBits(), llvm::MCDisassembler::getSubtargetInfo(), isInvalidPState(), and Success.
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Definition at line 1342 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), llvm::MCD::fieldFromInstruction(), llvm::SignExtend64(), Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
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Definition at line 385 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), llvm::MCInst::getOpcode(), and Success.
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Definition at line 1449 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Fail, and Success.
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Definition at line 1282 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCD::fieldFromInstruction(), llvm::SignExtend64(), Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
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Definition at line 491 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), llvm::MCInst::getOpcode(), Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
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Definition at line 372 of file AArch64Disassembler.cpp.
References DecodeVecShiftLImm().
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Definition at line 366 of file AArch64Disassembler.cpp.
References DecodeVecShiftLImm().
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Definition at line 360 of file AArch64Disassembler.cpp.
References DecodeVecShiftLImm().
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Definition at line 378 of file AArch64Disassembler.cpp.
References DecodeVecShiftLImm().
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Definition at line 312 of file AArch64Disassembler.cpp.
References llvm::Add, llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and Success.
Referenced by DecodeVecShiftL16Imm(), DecodeVecShiftL32Imm(), DecodeVecShiftL64Imm(), and DecodeVecShiftL8Imm().
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Definition at line 342 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm().
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Definition at line 348 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm().
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Definition at line 330 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm().
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Definition at line 336 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm().
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Definition at line 318 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm().
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Definition at line 324 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm().
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Definition at line 354 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm().
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Definition at line 306 of file AArch64Disassembler.cpp.
References llvm::Add, llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and Success.
Referenced by DecodeVecShiftR16Imm(), DecodeVecShiftR16ImmNarrow(), DecodeVecShiftR32Imm(), DecodeVecShiftR32ImmNarrow(), DecodeVecShiftR64Imm(), DecodeVecShiftR64ImmNarrow(), and DecodeVecShiftR8Imm().
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Definition at line 1377 of file AArch64Disassembler.cpp.
References DecodeGPRSeqPairsClassRegisterClass().
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Definition at line 1384 of file AArch64Disassembler.cpp.
References DecodeGPRSeqPairsClassRegisterClass().
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Definition at line 1429 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and Success.
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Definition at line 104 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 91 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, Reg, and Success.
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Definition at line 115 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 78 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, Reg, and Success.
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Definition at line 136 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), and Success.
Definition at line 1293 of file AArch64Disassembler.cpp.
Referenced by DecodeSystemPStateImm0_15Instruction(), and DecodeSystemPStateImm0_1Instruction().
| LLVM_ABI LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAArch64Disassembler | ( | ) |
Definition at line 1687 of file AArch64Disassembler.cpp.
References createAArch64Disassembler(), createAArch64ExternalSymbolizer(), llvm::getTheAArch64_32Target(), llvm::getTheAArch64beTarget(), llvm::getTheAArch64leTarget(), llvm::getTheARM64_32Target(), llvm::getTheARM64Target(), llvm::TargetRegistry::RegisterMCDisassembler(), and llvm::TargetRegistry::RegisterMCSymbolizer().